u-boot/arch/riscv/include/asm/syscon.h
Sean Anderson e86463f8e3 riscv: Rework Andes PLMT as a UCLASS_TIMER driver
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.

The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree. Using timebase-frequency only really
makes sense when the cpu itself is the timer device. This is the case when
we read the time from a CSR, but not when there is a separate device.
Second, it lets the device use the clock subsystem which adds flexibility.
If the device is configured for a different clock speed, the timer can
adjust itself.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-30 08:54:45 +08:00

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C

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
*/
#ifndef _ASM_SYSCON_H
#define _ASM_SYSCON_H
/*
* System controllers in a RISC-V system. These should only be used for
* identifying IPI controllers. Other devices should use DM to probe.
*/
enum {
RISCV_NONE,
RISCV_SYSCON_CLINT, /* Core Local Interruptor (CLINT) */
RISCV_SYSCON_PLIC, /* Platform Level Interrupt Controller (PLIC) */
};
#endif /* _ASM_SYSCON_H */