Simon Glass aff2523f69 x86: Add support for MTRRs ... Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use. Clean up the existing header file to follow style, and remove the unneeded code. These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit). Signed-off-by: Simon Glass <sjg@chromium.org>		2015-01-13 07:25:00 -08:00
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asm	x86: Add support for MTRRs	2015-01-13 07:25:00 -08:00