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afaa9f65c2
The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
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altera_spi.c | ||
atmel_dataflash_spi.c | ||
atmel_spi.c | ||
atmel_spi.h | ||
bfin_spi.c | ||
cf_spi.c | ||
davinci_spi.c | ||
davinci_spi.h | ||
kirkwood_spi.c | ||
Makefile | ||
mpc8xxx_spi.c | ||
mpc52xx_spi.c | ||
mxc_spi.c | ||
omap3_spi.c | ||
omap3_spi.h | ||
soft_spi.c |