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609bd60b94
This is effectively a complete rewrite to remove all dependency on CCF. The code is now smaller, and so is the binary. It also takes up less memory at runtime (since we don't have to create 40 udevices). In general, I am much happier with this driver as much of the complexity and late binding has been removed. The k210_*_params structs which were previously used to initialize CCF clocks are now used as the complete configuration. Since we can write our own division logic, we can now do away with several "half" clocks which only existed to provide constant factors of two. The clock IDs have been renumbered to remove unused clocks. This may not be the last time they are renumbered, since we have diverged with Linux. There are also still a few clocks left out which may need to be added back in. In general, I have tried to leave out behavioral changes. However, there is a small bugfix regarding ACLK. According to the technical reference manual, its mux comes *after* its divider (which is present only for PLL0). This would have required yet another intermediate clock to fix with CCF, but with the new driver it is just 2 lines of code :) Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
12 lines
370 B
Text
12 lines
370 B
Text
config CLK_K210
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bool "Clock support for Kendryte K210"
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depends on CLK
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help
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This enables support clock driver for Kendryte K210 platforms.
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config CLK_K210_SET_RATE
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bool "Enable setting the Kendryte K210 PLL rate"
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depends on CLK_K210
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help
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Add functionality to calculate new rates for K210 PLLs. Enabling this
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feature adds around 1K to U-Boot's final size.
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