mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-18 10:48:51 +00:00
af523a0d56
The endian and base address of PEX LUT register region is different between Chassis 2 and Chassis 3, so move the base address definition to chassis specific header file and add pex_lut_* functions to access LUT register. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
61 lines
1.6 KiB
C
61 lines
1.6 KiB
C
/*
|
|
* Copyright 2015 Freescale Semiconductor
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_
|
|
#define _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_
|
|
|
|
#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE
|
|
#define gur_in32(a) in_le32(a)
|
|
#define gur_out32(a, v) out_le32(a, v)
|
|
#elif defined(CONFIG_SYS_FSL_CCSR_GUR_BE)
|
|
#define gur_in32(a) in_be32(a)
|
|
#define gur_out32(a, v) out_be32(a, v)
|
|
#endif
|
|
|
|
#ifdef CONFIG_SYS_FSL_CCSR_SCFG_LE
|
|
#define scfg_in32(a) in_le32(a)
|
|
#define scfg_out32(a, v) out_le32(a, v)
|
|
#elif defined(CONFIG_SYS_FSL_CCSR_SCFG_BE)
|
|
#define scfg_in32(a) in_be32(a)
|
|
#define scfg_out32(a, v) out_be32(a, v)
|
|
#endif
|
|
|
|
#ifdef CONFIG_SYS_FSL_PEX_LUT_LE
|
|
#define pex_lut_in32(a) in_le32(a)
|
|
#define pex_lut_out32(a, v) out_le32(a, v)
|
|
#elif defined(CONFIG_SYS_FSL_PEX_LUT_BE)
|
|
#define pex_lut_in32(a) in_be32(a)
|
|
#define pex_lut_out32(a, v) out_be32(a, v)
|
|
#endif
|
|
|
|
struct cpu_type {
|
|
char name[15];
|
|
u32 soc_ver;
|
|
u32 num_cores;
|
|
};
|
|
|
|
#define CPU_TYPE_ENTRY(n, v, nc) \
|
|
{ .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)}
|
|
|
|
#define SVR_WO_E 0xFFFFFE
|
|
#define SVR_LS1043 0x879204
|
|
#define SVR_LS2045 0x870120
|
|
#define SVR_LS2080 0x870110
|
|
#define SVR_LS2085 0x870100
|
|
|
|
#define SVR_MAJ(svr) (((svr) >> 4) & 0xf)
|
|
#define SVR_MIN(svr) (((svr) >> 0) & 0xf)
|
|
#define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E)
|
|
#define IS_E_PROCESSOR(svr) (!((svr >> 8) & 0x1))
|
|
|
|
#ifdef CONFIG_FSL_LSCH3
|
|
void fsl_lsch3_early_init_f(void);
|
|
#elif defined(CONFIG_FSL_LSCH2)
|
|
void fsl_lsch2_early_init_f(void);
|
|
#endif
|
|
|
|
void cpu_name(char *name);
|
|
#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
|