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u-boot/arch/powerpc/cpu
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York Sun 1e0d51a6c4 powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores 
Commit 06ad970b53 ("powerpc: mpc85xx: Implemente workaround for CPU
erratum A-007907") clears L1CSR2 for the boot core, but other cores
don't run through the workaround. Add similar code for secondary
cores to clear DCSTASHID field in L1CSR2 register.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-10-23 14:02:48 -07:00
..
mpc8xx powerpc: Rework interrupt_init_cpu() 2017-08-26 14:56:08 -04:00
mpc8xxx powerpc: Drop probecpu() in favour of arch_cpu_init() 2017-01-25 17:38:41 -05:00
mpc83xx powerpc: Rework interrupt_init_cpu() 2017-08-26 14:56:08 -04:00
mpc85xx powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores 2017-10-23 14:02:48 -07:00
mpc86xx powerpc: Rework interrupt_init_cpu() 2017-08-26 14:56:08 -04:00
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