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https://github.com/AsahiLinux/u-boot
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8bad6cb176
fat.h unconditionally defines CONFIG_SUPPORT_VFAT (and has done since 2003), so as a result VFAT support is always enabled regardless of whether a board config defines it or not. Drop this unnecessary option. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
129 lines
2.7 KiB
C
129 lines
2.7 KiB
C
/*
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* (c) 2011 Graf-Syteco, Matthias Weisser
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* <weisserm@arcor.de>
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*
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* Configuation settings for the zmx25 board
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_TEXT_BASE 0xA0000000
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#define CONFIG_SYS_TIMER_RATE 32768
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#define CONFIG_SYS_TIMER_COUNTER \
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(&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
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#define CONFIG_MACH_TYPE MACH_TYPE_ZMX25
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/*
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* Environment settings
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"gs_fast_boot=setenv bootdelay 5\0" \
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"gs_slow_boot=setenv bootdelay 10\0" \
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"bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
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"fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
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"bootm 0x81000000; bootelf 0x81000000\0"
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Hardware drivers
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*/
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/*
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* GPIO
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*/
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#define CONFIG_MXC_GPIO
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/*
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* Serial
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*/
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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#define CONFIG_CONS_INDEX 1 /* use UART2 for console */
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/*
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* Ethernet
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*/
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#define CONFIG_FEC_MXC
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#define CONFIG_FEC_MXC_PHYADDR 0x00
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#define CONFIG_MII
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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/*
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* Additional command
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*/
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/*
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* USB
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*/
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#ifdef CONFIG_CMD_USB
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#define CONFIG_USB_EHCI_MXC
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL
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#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
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#define CONFIG_EHCI_IS_TDI
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#endif /* CONFIG_CMD_USB */
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/* SDRAM */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */
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#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */
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/*
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_BASE 0xA0000000
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 256
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_ENV_SIZE (128 * 1024)
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/*
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* CFI FLASH driver setup
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* ~10x faster */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
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#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_PREBOOT ""
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/*
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* Size of malloc() pool
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*/
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#define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000)
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#endif /* __CONFIG_H */
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