mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-06 21:24:29 +00:00
68d875da4c
Synchronize CPSW/MDIO/PHY DT nodes with latest linux - replace deprecated phy_id property with phy-handle. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com>
83 lines
1.8 KiB
Text
83 lines
1.8 KiB
Text
/*
|
|
* Copyright (C) 2014-2016 Texas Instruments Incorporated - http://www.ti.com/
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
#include "dra72-evm-common.dtsi"
|
|
#include "dra72x-mmc-iodelay.dtsi"
|
|
/ {
|
|
model = "TI DRA722";
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
|
|
};
|
|
|
|
evm_1v8_sw: fixedregulator-evm_1v8 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "evm_1v8";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
vin-supply = <&smps4_reg>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
tps65917: tps65917@58 {
|
|
reg = <0x58>;
|
|
|
|
interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */
|
|
};
|
|
};
|
|
|
|
#include "dra72-evm-tps65917.dtsi"
|
|
|
|
&hdmi {
|
|
vdda-supply = <&ldo3_reg>;
|
|
};
|
|
|
|
&pcf_gpio_21 {
|
|
interrupt-parent = <&gpio6>;
|
|
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
|
|
};
|
|
|
|
&mac {
|
|
slaves = <1>;
|
|
mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
&cpsw_emac0 {
|
|
phy-handle = <ðphy0>;
|
|
phy-mode = "rgmii";
|
|
};
|
|
|
|
&davinci_mdio {
|
|
ethphy0: ethernet-phy@3 {
|
|
reg = <3>;
|
|
};
|
|
};
|
|
|
|
&mmc1 {
|
|
pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
|
|
pinctrl-0 = <&mmc1_pins_default>;
|
|
pinctrl-1 = <&mmc1_pins_hs>;
|
|
pinctrl-2 = <&mmc1_pins_sdr12>;
|
|
pinctrl-3 = <&mmc1_pins_sdr25>;
|
|
pinctrl-4 = <&mmc1_pins_sdr50>;
|
|
pinctrl-5 = <&mmc1_pins_ddr50_rev10>;
|
|
pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev10_conf>;
|
|
vqmmc-supply = <&ldo1_reg>;
|
|
};
|
|
|
|
&mmc2 {
|
|
pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
|
|
pinctrl-0 = <&mmc2_pins_default>;
|
|
pinctrl-1 = <&mmc2_pins_hs>;
|
|
pinctrl-2 = <&mmc2_pins_ddr_rev10>;
|
|
pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev10_conf>;
|
|
vmmc-supply = <&evm_1v8_sw>;
|
|
};
|