mirror of
https://github.com/AsahiLinux/u-boot
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198 lines
4.4 KiB
C
198 lines
4.4 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <asm/arch/pxa-regs.h>
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DECLARE_GLOBAL_DATA_PTR;
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void serial_setbrg (void)
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{
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unsigned int quot = 0;
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if (gd->baudrate == 1200)
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quot = 768;
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else if (gd->baudrate == 9600)
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quot = 96;
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else if (gd->baudrate == 19200)
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quot = 48;
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else if (gd->baudrate == 38400)
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quot = 24;
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else if (gd->baudrate == 57600)
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quot = 16;
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else if (gd->baudrate == 115200)
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quot = 8;
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else
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hang ();
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#ifdef CONFIG_FFUART
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#ifdef CONFIG_CPU_MONAHANS
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CKENA |= CKENA_22_FFUART;
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#else
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CKEN |= CKEN6_FFUART;
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#endif /* CONFIG_CPU_MONAHANS */
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FFIER = 0; /* Disable for now */
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FFFCR = 0; /* No fifos enabled */
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/* set baud rate */
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FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB;
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FFDLL = quot & 0xff;
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FFDLH = quot >> 8;
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FFLCR = LCR_WLS0 | LCR_WLS1;
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FFIER = IER_UUE; /* Enable FFUART */
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#elif defined(CONFIG_BTUART)
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#ifdef CONFIG_CPU_MONAHANS
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CKENA |= CKENA_21_BTUART;
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#else
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CKEN |= CKEN7_BTUART;
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#endif /* CONFIG_CPU_MONAHANS */
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BTIER = 0;
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BTFCR = 0;
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/* set baud rate */
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BTLCR = LCR_DLAB;
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BTDLL = quot & 0xff;
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BTDLH = quot >> 8;
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BTLCR = LCR_WLS0 | LCR_WLS1;
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BTIER = IER_UUE; /* Enable BFUART */
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#elif defined(CONFIG_STUART)
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#ifdef CONFIG_CPU_MONAHANS
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CKENA |= CKENA_23_STUART;
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#else
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CKEN |= CKEN5_STUART;
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#endif /* CONFIG_CPU_MONAHANS */
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STIER = 0;
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STFCR = 0;
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/* set baud rate */
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STLCR = LCR_DLAB;
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STDLL = quot & 0xff;
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STDLH = quot >> 8;
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STLCR = LCR_WLS0 | LCR_WLS1;
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STIER = IER_UUE; /* Enable STUART */
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#else
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#error "Bad: you didn't configure serial ..."
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#endif
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}
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/*
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* Initialise the serial port with the given baudrate. The settings
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* are always 8 data bits, no parity, 1 stop bit, no start bits.
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*
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*/
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int serial_init (void)
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{
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serial_setbrg ();
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return (0);
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}
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/*
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* Output a single byte to the serial port.
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*/
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void serial_putc (const char c)
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{
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#ifdef CONFIG_FFUART
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/* wait for room in the tx FIFO on FFUART */
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while ((FFLSR & LSR_TEMT) == 0)
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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FFTHR = c;
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#elif defined(CONFIG_BTUART)
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while ((BTLSR & LSR_TEMT ) == 0 )
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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BTTHR = c;
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#elif defined(CONFIG_STUART)
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while ((STLSR & LSR_TEMT ) == 0 )
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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STTHR = c;
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#endif
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/* If \n, also do \r */
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if (c == '\n')
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serial_putc ('\r');
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}
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/*
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* Read a single byte from the serial port. Returns 1 on success, 0
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* otherwise. When the function is succesfull, the character read is
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* written into its argument c.
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*/
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int serial_tstc (void)
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{
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#ifdef CONFIG_FFUART
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return FFLSR & LSR_DR;
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#elif defined(CONFIG_BTUART)
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return BTLSR & LSR_DR;
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#elif defined(CONFIG_STUART)
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return STLSR & LSR_DR;
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#endif
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}
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/*
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* Read a single byte from the serial port. Returns 1 on success, 0
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* otherwise. When the function is succesfull, the character read is
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* written into its argument c.
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*/
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int serial_getc (void)
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{
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#ifdef CONFIG_FFUART
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while (!(FFLSR & LSR_DR))
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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return (char) FFRBR & 0xff;
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#elif defined(CONFIG_BTUART)
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while (!(BTLSR & LSR_DR))
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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return (char) BTRBR & 0xff;
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#elif defined(CONFIG_STUART)
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while (!(STLSR & LSR_DR))
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WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
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return (char) STRBR & 0xff;
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#endif
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}
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void
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serial_puts (const char *s)
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{
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while (*s) {
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serial_putc (*s++);
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}
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}
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