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https://github.com/AsahiLinux/u-boot
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20a3969d33
Remove the following STV0991 specific configs: - CONFIG_STV0991 (never used, only defined in CONFIG_SYS_EXTRA_OPTIONS) - CONFIG_STV0991_HZ (replaced by generic CONFIG_SYS_HZ) - CONFIG_STV0991_HZ_CLOCK (replaced by generic CONFIG_SYS_HZ_CLOCK) This patch allows to reduce the file config_whitelist.txt. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
114 lines
2.6 KiB
C
114 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2014, STMicroelectronics - All Rights Reserved
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* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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*/
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#include <common.h>
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#include <init.h>
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#include <time.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch-stv0991/hardware.h>
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#include <asm/arch-stv0991/stv0991_cgu.h>
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#include <asm/arch-stv0991/stv0991_gpt.h>
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#include <linux/delay.h>
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static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
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(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
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#define READ_TIMER() (readl(&gpt1_regs_ptr->cnt) & GPT_FREE_RUNNING)
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#define GPT_RESOLUTION (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
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DECLARE_GLOBAL_DATA_PTR;
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#define timestamp gd->arch.tbl
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#define lastdec gd->arch.lastinc
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static ulong get_timer_masked(void);
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int timer_init(void)
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{
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/* Timer1 clock configuration */
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writel(TIMER1_CLK_CFG, &stv0991_cgu_regs->tim_freq);
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writel(readl(&stv0991_cgu_regs->cgu_enable_2) |
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TIMER1_CLK_EN, &stv0991_cgu_regs->cgu_enable_2);
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/* Stop the timer */
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writel(readl(&gpt1_regs_ptr->cr1) & ~GPT_CR1_CEN, &gpt1_regs_ptr->cr1);
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writel(GPT_PRESCALER_128, &gpt1_regs_ptr->psc);
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/* Configure timer for auto-reload */
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writel(readl(&gpt1_regs_ptr->cr1) | GPT_MODE_AUTO_RELOAD,
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&gpt1_regs_ptr->cr1);
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/* load value for free running */
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writel(GPT_FREE_RUNNING, &gpt1_regs_ptr->arr);
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/* start timer */
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writel(readl(&gpt1_regs_ptr->cr1) | GPT_CR1_CEN,
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&gpt1_regs_ptr->cr1);
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/* Reset the timer */
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lastdec = READ_TIMER();
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timestamp = 0;
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return 0;
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}
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/*
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* timer without interrupts
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*/
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ulong get_timer(ulong base)
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{
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return (get_timer_masked() / GPT_RESOLUTION) - base;
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}
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void __udelay(unsigned long usec)
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{
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ulong tmo;
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ulong start = get_timer_masked();
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ulong tenudelcnt = CONFIG_SYS_HZ_CLOCK / (1000 * 100);
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ulong rndoff;
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rndoff = (usec % 10) ? 1 : 0;
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/* tenudelcnt timer tick gives 10 microsecconds delay */
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tmo = ((usec / 10) + rndoff) * tenudelcnt;
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while ((ulong) (get_timer_masked() - start) < tmo)
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;
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}
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static ulong get_timer_masked(void)
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{
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ulong now = READ_TIMER();
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if (now >= lastdec) {
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/* normal mode */
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timestamp += now - lastdec;
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} else {
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/* we have an overflow ... */
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timestamp += now + GPT_FREE_RUNNING - lastdec;
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}
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lastdec = now;
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return timestamp;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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