Kautuk Consul ae3527f088 arch/riscv: add semihosting support for RISC-V ... We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel <apatel@ventanamicro.com> Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>		2022-12-08 15:15:58 +08:00
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cpu	riscv: Fix detecting FPU support in standard extension	2022-11-15 15:37:17 +08:00
dts	riscv: dts: fix the mpfs's reference clock frequency	2022-11-15 15:37:17 +08:00
include/asm	arch/riscv: add semihosting support for RISC-V	2022-12-08 15:15:58 +08:00
lib	arch/riscv: add semihosting support for RISC-V	2022-12-08 15:15:58 +08:00
config.mk	kconfig / kbuild: Re-sync with Linux 4.19	2020-04-10 11:18:32 -04:00
Kconfig	riscv: clarify meaning of CONFIG_SBI_V02	2022-11-15 15:37:17 +08:00
Makefile	riscv: support building double-float modules	2022-10-20 15:22:21 +08:00