Alexey Brodkin 17b0da8019 axs101: flush DMA buffer descriptors before DMA transactons starts ... CPU sets DMA buffer descriptors with data required for inetrnal DMA such as: * Ownership of BD * Buffer size * Pointer to data buffer in memory Then we need to make sure DMA engine of NAND controller gets proper data. For this we flush buffer rescriptor. Then we're ready for DMA transaction. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Tom Rini <trini@ti.com>		2014-03-28 15:06:30 -04:00
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axs101.c	axs101: fix dw gmac instantiation for updated dw gmac driver	2014-02-21 07:54:05 -05:00
Makefile	arc: add AXS101 board support	2014-02-07 08:14:33 -05:00
nand.c	axs101: flush DMA buffer descriptors before DMA transactons starts	2014-03-28 15:06:30 -04:00