Chris Packham ad91fdfff0 arm: mvebu: update RTC values for PCIe memory wrappers ... Update the RTC (Read Timing Control) values for PCIe memory wrappers following an ERRATA (ERRATA# TDB). This means the PCIe accesses will used slower memory Read Timing, to allow more efficient energy consumption, in order to lower the minimum VDD of the memory. Will lead to more robust memory when voltage drop occurs (VDDSEG) The code is based on changes from Marvell's U-Boot, specifically: 20cd270407 eb608a7c8d c4af19ae2b Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>		2020-04-14 13:16:42 +02:00
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a38x	arm: mvebu: update RTC values for PCIe memory wrappers	2020-04-14 13:16:42 +02:00
axp	arm: mvebu: AXP: Enhance PCIe port capability configuration	2019-04-12 07:04:18 +02:00