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a462c34602
1. Define two structures mx6ul_iomux_ddr_regs and mx6ul_iomux_grp_regs. 2. Add a new function mx6ul_dram_iocfg to configure dram io. 3. Refactor MMDC1 macro, discard "#ifdef CONFIG_MX6SX". Since only mmdc0 channel exists on i.MX6SX/UL, redefine MMDC1 macro support runtime check, but not hardcoding #ifdef macros. 4. Introduce mx6ul-ddr.h, which includes the register address for DRAM IO configuration. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> |
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.. | ||
clock.h | ||
crm_regs.h | ||
gpio.h | ||
hab.h | ||
imx-regs.h | ||
iomux.h | ||
mx6-ddr.h | ||
mx6-pins.h | ||
mx6dl-ddr.h | ||
mx6dl_pins.h | ||
mx6q-ddr.h | ||
mx6q_pins.h | ||
mx6sl_pins.h | ||
mx6sx-ddr.h | ||
mx6sx_pins.h | ||
mx6ul-ddr.h | ||
mx6ul_pins.h | ||
mxc_hdmi.h | ||
sys_proto.h |