Thierry Reding ad3d6e88a1 armv8/mmu: Set bits marked RES1 in TCR ... For EL3 and EL2, the documentation says that bits 31 and 23 are reserved but should be written as 1. For EL1, only bit 23 is not reserved, so only write bit 31 as 1. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-10-15 14:46:43 +02:00
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asm	armv8/mmu: Set bits marked RES1 in TCR	2015-10-15 14:46:43 +02:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00