u-boot/arch/powerpc
Kumar Gala acf3f8da98 powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache.  So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release.  For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
..
cpu powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E 2011-07-29 08:53:38 -05:00
include/asm powerpc/85xx: Adding configuration for DCSRCR to enable 32M access 2011-07-29 08:53:37 -05:00
lib powerpc/85xx: Fix setting of EPAPR_MAGIC value 2011-07-29 08:53:37 -05:00
config.mk Handle most LDSCRIPT setting centrally 2011-04-30 00:59:47 +02:00