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44cdfc0ece
Testing and analysis shows that at the moment LPC32xx NAND SLC driver can not get PL080 DMA backbone support in SPL build, because SPL NAND loaders operate with subpage (ECC step to be precisely) reads, and this is not supported in the NAND SLC + DMA + hardware ECC calculation bundle. The change removes a cautious build time warning and explicitly disables DMA flavour of the driver for SPL builds, to reduce the amound of #ifdef sections the code blocks are minimally reorganized. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> |
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.. | ||
nand | ||
onenand | ||
spi | ||
ubi | ||
ubispl | ||
altera_qspi.c | ||
cfi_flash.c | ||
cfi_mtd.c | ||
jedec_flash.c | ||
Kconfig | ||
Makefile | ||
mtd-uclass.c | ||
mtd_uboot.c | ||
mtdconcat.c | ||
mtdcore.c | ||
mtdcore.h | ||
mtdpart.c | ||
mw_eeprom.c | ||
pic32_flash.c | ||
renesas_rpc_hf.c | ||
st_smi.c | ||
stm32_flash.c | ||
stm32_flash.h |