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https://github.com/AsahiLinux/u-boot
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ab06b236f7
This support of CPLD includes
- Files and register definitions
- Command to switch alternate bank
- Command to switch default bank
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
31 lines
901 B
C
31 lines
901 B
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/fsl_law.h>
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#include <asm/mmu.h>
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struct law_entry law_table[] = {
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SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_IFC),
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#ifdef CONFIG_SYS_BMAN_MEM_PHYS
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SET_LAW(CONFIG_SYS_BMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_BMAN),
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#endif
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#ifdef CONFIG_SYS_QMAN_MEM_PHYS
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SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_QMAN),
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#endif
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#ifdef CONFIG_SYS_CPLD_BASE_PHYS
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SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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#endif
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#ifdef CONFIG_SYS_DCSRBAR_PHYS
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/* Limit DCSR to 32M to access NPC Trace Buffer */
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SET_LAW(CONFIG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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#endif
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#ifdef CONFIG_SYS_NAND_BASE_PHYS
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SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
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#endif
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};
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int num_law_entries = ARRAY_SIZE(law_table);
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