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u-boot/drivers/ddr/marvell/a38x
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Tom Rini 12e3547f5a ARM: mvebu: a38x: Correct mismatched bound warnings 
With gcc-11 we see:
drivers/ddr/marvell/a38x/ddr3_debug.c:672:47: error: argument 2 of type 'u32[5]' {aka 'unsigned int[5]'} with mismatched bound [-Werror=array-parameter=]
  672 | int ddr3_tip_read_adll_value(u32 dev_num, u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],
      |                                           ~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from drivers/ddr/marvell/a38x/ddr3_training_ip_engine.h:10,
                 from drivers/ddr/marvell/a38x/ddr3_init.h:17,
                 from drivers/ddr/marvell/a38x/ddr3_debug.c:6:
drivers/ddr/marvell/a38x/ddr3_training_ip_flow.h:116:47: note: previously declared as 'u32[]' {aka 'unsigned int[]'}

And similar warnings.  Correct these by updating the prototype.  Remove
the prototype for ddr3_tip_read_pup_value as it is unused.

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-07 10:17:54 -04:00
..
ddr3_debug.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_init.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_init.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_logging_def.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_patterns_64bit.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_training_bist.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_centralization.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_db.c ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit 2021-02-26 10:22:29 +01:00
ddr3_training_hw_algo.c mv_ddr: ddr3: Update {min,max}_read_sample calculation 2020-07-09 06:49:44 +02:00
ddr3_training_hw_algo.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_bist.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training_ip_centralization.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip_db.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
ddr3_training_ip_def.h ddr: marvell: a38x: add 16Gbit memory devices support 2021-02-26 10:22:29 +01:00
ddr3_training_ip_engine.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr3_training_ip_engine.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_ip_flow.h ARM: mvebu: a38x: Correct mismatched bound warnings 2021-07-07 10:17:54 -04:00
ddr3_training_ip_pbs.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
ddr3_training_ip_prv_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_leveling.c arm: mvebu: a38x: Remove dead code ARMADA_39X 2021-03-12 07:44:21 +01:00
ddr3_training_leveling.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr3_training_pbs.c ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
ddr_ml_wrapper.h ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
ddr_topology_def.h ddr: marvell: a38x: enum mv_ddr_twin_die: change order 2021-02-26 10:22:29 +01:00
ddr_training_ip_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
dram_if.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
Makefile ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_build_message.c ddr: marvell: a38x: bump version to 14.0.0 2021-02-26 10:22:29 +01:00
mv_ddr_common.c ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_common.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_plat.c arm: mvebu: a38x: Remove dead code ARMADA_39X 2021-03-12 07:44:21 +01:00
mv_ddr_plat.h ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
mv_ddr_regs.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
mv_ddr_spd.c ddr: marvell: a38x: fix memory size calculation using 32bit bus width 2021-02-26 10:22:29 +01:00
mv_ddr_spd.h ddr: marvell: a38x: Add more space for additional info from SPD 2021-03-12 07:42:37 +01:00
mv_ddr_sys_env_lib.c ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
mv_ddr_sys_env_lib.h arm: mvebu: a38x: Remove dead code ARMADA_39X 2021-03-12 07:44:21 +01:00
mv_ddr_topology.c ddr: marvell: a38x: add support for twin-die combined memory device 2021-02-26 10:22:29 +01:00
mv_ddr_topology.h ddr: marvell: a38x: import header change from upstream 2021-02-26 10:22:29 +01:00
mv_ddr_training_db.h ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 2018-12-08 16:19:40 +01:00
seq_exec.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
xor.c ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository 2021-03-12 07:42:37 +01:00
xor.h ARM: mvebu: a38x: sync ddr training code with upstream 2018-05-14 10:01:56 +02:00
xor_regs.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00