mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-21 02:33:07 +00:00
77b11f7604
As part of the effort of making U-Boot work with the same device tree as Linux, there is an issue with the "xfi" phy-mode. To be precise, in Linux there was a discussion (for those who have time to read: https://lore.kernel.org/netdev/1576768881-24971-2-git-send-email-madalin.bucur@oss.nxp.com/) which led to a patch: https://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git/commit/?id=c114574ebfdf42f826776f717c8056a00fa94881 TL;DR: "xfi" was standardized in Linux as "10gbase-r". This patch changes the relevant occurrences in U-Boot to use "10gbase-r" instead of "xfi" wherever applicable. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
145 lines
3.7 KiB
Text
145 lines
3.7 KiB
Text
Overview
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--------
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The LS1088A Reference Design (RDB) is a high-performance computing,
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evaluation, and development platform that supports ARM SoC LS1088A and its
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derivatives.
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LS1088A SoC Overview
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--------------------------------------
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Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc
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RDB Default Switch Settings (1: ON; 0: OFF)
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-------------------------------------------
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For QSPI Boot
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SW1 0011 0001
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SW2 x100 0000
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SW3 1111 0010
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SW4 1001 0011
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SW5 1111 0000
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For SD Boot
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SW1 0010 0000
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SW2 0100 0000
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SW3 1111 0010
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SW4 1001 0011
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SW5 1111 0000
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For eMMC Boot
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SW1 0010 0000
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SW2 1100 0000
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SW3 1111 0010
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SW4 1001 0011
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SW5 1111 0000
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Alternately you can use this command to switch from QSPI to SD
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=> i2c mw 66 0x60 0x20; i2c mw 66 10 10;i2c mw 66 10 21
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LS1088ARDB board Overview
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-------------------------
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- SERDES Connections, 16 lanes supporting:
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- PCI Express - 3.0
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- SATA 3.0
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- 10GBase-R
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- QSGMII
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- DDR Controller
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- One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four
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chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
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with FSL refernce software is 2100MT/s
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- 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB
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- IFC/Local Bus
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- One 2 GB NAND flash with ECC support, not as boot source
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- CPLD of size 2K
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- USB 3.0
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- Two high speed USB 3.0 ports
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- First USB 3.0 port configured as Host with Type-A connector
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- Second USB 3.0 port configured as OTG with micro-AB connector
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- SDHC/eMMC
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- SDHC slot and onboard eMMC are muxed together
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- 4 I2C controllers
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- Two SATA onboard connectors
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- 2 UART
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- JTAG support
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- QSPI emulator support
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- TDM riser support
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QDS Default Switch Settings (1: ON; 0: OFF)
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-------------------------------------------
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For 16b IFC-NOR
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SW1 0001 0010
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SW2 x110 1111
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For QSPI Boot
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SW1 0011 0001
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SW2 0110 1111
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For SD Boot
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SW1 0010 0000
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SW2 0110 1111
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For eMMC Boot
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SW1 0010 0000
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SW2 1110 1111
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For I2C (ext. addr.)
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SW1 0010 0100
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SW2 1110 1111
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SW3 to SW12 are identical for all boot source
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SW3 0010 0100
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SW4 0010 0000
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SW5 1110 0111
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SW6 1110 1000
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SW7 0001 1101
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SW8 0000 1101
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SW9 1100 1010
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SW10 1110 1000
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SW11 1111 0100
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SW12 1111 1111
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LS1088AQDS board Overview
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-------------------------
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- SERDES Connections, 16 lanes supporting:
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- PCI Express - 3.0
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- SATA 3.0
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- 2 10GBase-R
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- QSGMII, SGMII with help for Riser card
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- 2 RGMII
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- 5 slot for Riser card or PCIe NIC
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- DDR Controller
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- One ports of 72-bits (8-bits ECC, 64-bits DATA) DDR4. Each port supports four
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chip-selects on one DIMM connector. Support is up to 2133MT/s, Although MAX default
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with FSL refernce software is 2100MT/s
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- 2 QSPI-NOR Spansion(S25FS512SDSMFI011) flash of size 64MB
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- IFC/Local Bus
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- One 2 GB NAND flash with ECC support, not as boot source
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- CPLD of size 2K
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- USB 3.0
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- Two high speed USB 3.0 ports
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- First USB 3.0 port configured as Host with Type-A connector
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- Second USB 3.0 port configured as OTG with micro-AB connector
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- SDHC/eMMC
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- SDHC/eMMC slot via adaptor
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- 4 I2C controllers
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- Two SATA onboard connectors
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- 2 UART
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- JTAG support
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- DSPI
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- PROMJET support
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- QSPI emulator support
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- TDM riser support
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QSPI flash memory map valid for both QDS and RDB
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Image Flash Offset
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RCW+PBI 0x00000000
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Boot firmware (U-Boot) 0x00100000
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Boot firmware Environment 0x00300000
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PPA firmware 0x00400000
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DPAA2 MC 0x00A00000
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DPAA2 DPL 0x00D00000
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DPAA2 DPC 0x00E00000
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Kernel.itb 0x01000000
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