mirror of
https://github.com/AsahiLinux/u-boot
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
206 lines
4 KiB
C
206 lines
4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2013 Keymile AG
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* Valentin Longchamp <valentin.longchamp@keymile.com>
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*/
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#include <common.h>
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#include "../common/common.h"
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#include "kmp204x.h"
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/* QRIO GPIO register offsets */
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#define DIRECT_OFF 0x18
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#define GPRT_OFF 0x1c
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int qrio_get_gpio(u8 port_off, u8 gpio_nr)
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{
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u32 gprt;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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gprt = in_be32(qrio_base + port_off + GPRT_OFF);
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return (gprt >> gpio_nr) & 1U;
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}
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void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value)
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{
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u32 gprt, mask;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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mask = 1U << gpio_nr;
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gprt = in_be32(qrio_base + port_off + GPRT_OFF);
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if (value)
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gprt |= mask;
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else
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gprt &= ~mask;
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out_be32(qrio_base + port_off + GPRT_OFF, gprt);
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}
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void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value)
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{
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u32 direct, mask;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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mask = 1U << gpio_nr;
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direct = in_be32(qrio_base + port_off + DIRECT_OFF);
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direct |= mask;
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out_be32(qrio_base + port_off + DIRECT_OFF, direct);
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qrio_set_gpio(port_off, gpio_nr, value);
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}
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void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr)
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{
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u32 direct, mask;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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mask = 1U << gpio_nr;
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direct = in_be32(qrio_base + port_off + DIRECT_OFF);
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direct &= ~mask;
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out_be32(qrio_base + port_off + DIRECT_OFF, direct);
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}
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void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val)
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{
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u32 direct, mask;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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mask = 1U << gpio_nr;
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direct = in_be32(qrio_base + port_off + DIRECT_OFF);
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if (val == 0)
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/* set to output -> GPIO drives low */
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direct |= mask;
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else
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/* set to input -> GPIO floating */
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direct &= ~mask;
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out_be32(qrio_base + port_off + DIRECT_OFF, direct);
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}
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#define WDMASK_OFF 0x16
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void qrio_wdmask(u8 bit, bool wden)
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{
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u16 wdmask;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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wdmask = in_be16(qrio_base + WDMASK_OFF);
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if (wden)
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wdmask |= (1 << bit);
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else
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wdmask &= ~(1 << bit);
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out_be16(qrio_base + WDMASK_OFF, wdmask);
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}
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#define PRST_OFF 0x1a
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void qrio_prst(u8 bit, bool en, bool wden)
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{
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u16 prst;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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qrio_wdmask(bit, wden);
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prst = in_be16(qrio_base + PRST_OFF);
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if (en)
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prst &= ~(1 << bit);
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else
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prst |= (1 << bit);
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out_be16(qrio_base + PRST_OFF, prst);
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}
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#define PRSTCFG_OFF 0x1c
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void qrio_prstcfg(u8 bit, u8 mode)
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{
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u32 prstcfg;
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u8 i;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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prstcfg = in_be32(qrio_base + PRSTCFG_OFF);
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for (i = 0; i < 2; i++) {
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if (mode & (1<<i))
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set_bit(2*bit+i, &prstcfg);
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else
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clear_bit(2*bit+i, &prstcfg);
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}
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out_be32(qrio_base + PRSTCFG_OFF, prstcfg);
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}
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#define CTRLH_OFF 0x02
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#define CTRLH_WRL_BOOT 0x01
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#define CTRLH_WRL_UNITRUN 0x02
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void qrio_set_leds(void)
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{
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u8 ctrlh;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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/* set UNIT LED to RED and BOOT LED to ON */
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ctrlh = in_8(qrio_base + CTRLH_OFF);
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ctrlh |= (CTRLH_WRL_BOOT | CTRLH_WRL_UNITRUN);
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out_8(qrio_base + CTRLH_OFF, ctrlh);
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}
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#define CTRLL_OFF 0x03
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#define CTRLL_WRB_BUFENA 0x20
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void qrio_enable_app_buffer(void)
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{
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u8 ctrll;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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/* enable application buffer */
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ctrll = in_8(qrio_base + CTRLL_OFF);
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ctrll |= (CTRLL_WRB_BUFENA);
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out_8(qrio_base + CTRLL_OFF, ctrll);
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}
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#define REASON1_OFF 0x12
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#define REASON1_CPUWD 0x01
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void qrio_cpuwd_flag(bool flag)
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{
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u8 reason1;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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reason1 = in_8(qrio_base + REASON1_OFF);
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if (flag)
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reason1 |= REASON1_CPUWD;
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else
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reason1 &= ~REASON1_CPUWD;
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out_8(qrio_base + REASON1_OFF, reason1);
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}
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#define RSTCFG_OFF 0x11
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void qrio_uprstreq(u8 mode)
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{
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u32 rstcfg;
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void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE;
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rstcfg = in_8(qrio_base + RSTCFG_OFF);
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if (mode & UPREQ_CORE_RST)
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rstcfg |= UPREQ_CORE_RST;
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else
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rstcfg &= ~UPREQ_CORE_RST;
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out_8(qrio_base + RSTCFG_OFF, rstcfg);
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}
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