Thierry Reding aba11d4476 ARM: tegra124: Clear IDDQ when enabling PLLC ... Enabling a PLL while IDDQ is high. The Linux kernel checks for this condition and warns about it verbosely, so while this seems to work fine, fix it up according to the programming guidelines provided in the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup Sequence"). Reported-by: Nicolas Chauvet <kwizart@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-09-16 16:11:31 -07:00
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asm	ARM: tegra124: Clear IDDQ when enabling PLLC	2015-09-16 16:11:31 -07:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00