mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-11 23:47:24 +00:00
9b15ce9193
Add board and SoC dts Add ddr training code support SD/MMC/GPIO/PINCTRL/UART Signed-off-by: Peng Fan <peng.fan@nxp.com>
92 lines
826 B
Text
92 lines
826 B
Text
// SPDX-License-Identifier: GPL-2.0+
|
|
/*
|
|
* Copyright 2019 NXP
|
|
*/
|
|
|
|
&{/soc} {
|
|
u-boot,dm-pre-reloc;
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&clk {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&osc_24m {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&aips1 {
|
|
u-boot,dm-spl;
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
&aips2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&aips3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&iomuxc {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_reg_usdhc2_vmmc {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_uart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc2_gpio {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&pinctrl_usdhc3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio3 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio4 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&gpio5 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&uart2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc1 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc2 {
|
|
u-boot,dm-spl;
|
|
};
|
|
|
|
&usdhc3 {
|
|
u-boot,dm-spl;
|
|
};
|