u-boot/arch/powerpc/cpu/mpc85xx/u-boot.lds
Pali Rohár e8c0e0064c powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support
Currently CONFIG_OF_SEPARATE is completely broken and U-Boot for some
mpc85xx board (e.g. P2020) has to be compiled with CONFIG_OF_EMBED.
Otherwise it crashes during early init.

When debug console is enabled and all debug logging options are turned on
then U-Boot on P2020 with CONFIG_OF_SEPARATE prints following error:

  No valid device tree binary found at 110dc300
  initcall sequence 110d3560 failed at call 1109535c (err=-1)
  ### ERROR ### Please RESET the board ###

Problem is with appended DTB. When CONFIG_SYS_MPC85XX_NO_RESETVEC is set
U-Boot binary image without DTB ends immediately after the .u_boot_list
section. At this position is defined _end symbol at which U-Boot expects
start of the appended DTB.

Problem is that after .u_boot_list section are in linker script defined
another sections with 256 byte long padding which are completely empty.
During conversion of U-Boot ELF binary to RAW binary u-boot-nodtb.bin,
objcopy removes trailing zero padding and therefore DTB is appended at
wrong position.

Changing alignment from 256 bytes to 4 bytes fixes this issue. And appended
DTB is finally at he correct position. With this fix U-Boot on P2020 with
CONFIG_OF_SEPARATE option starts working again.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2022-04-26 17:18:39 +05:30

128 lines
2.4 KiB
Text

/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2007-2009, 2011 Freescale Semiconductor, Inc.
*/
#include "config.h"
#ifdef CONFIG_RESET_VECTOR_ADDRESS
#define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS
#else
#define RESET_VECTOR_ADDRESS 0xfffffffc
#endif
#ifndef CONFIG_SYS_MONITOR_LEN
#define CONFIG_SYS_MONITOR_LEN 0x80000
#endif
OUTPUT_ARCH(powerpc)
ENTRY(_start)
PHDRS
{
text PT_LOAD;
bss PT_LOAD;
}
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.text :
{
*(.text*)
} :text
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
} :text
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
_GOT2_TABLE_ = .;
KEEP(*(.got2))
KEEP(*(.got))
_FIXUP_TABLE_ = .;
KEEP(*(.fixup))
}
__got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
__fixup_entries = (. - _FIXUP_TABLE_) >> 2;
.data :
{
*(.data*)
*(.sdata*)
}
_edata = .;
PROVIDE (edata = .);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(4);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(4);
__init_end = .;
_end = .;
#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
.bootpg ADDR(.text) - 0x1000 :
{
KEEP(arch/powerpc/cpu/mpc85xx/start.o (.bootpg))
} :text = 0xffff
. = ADDR(.text) + CONFIG_SYS_MONITOR_LEN;
#else
.bootpg RESET_VECTOR_ADDRESS - 0xffc :
{
arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
} :text = 0xffff
.resetvec RESET_VECTOR_ADDRESS :
{
KEEP(*(.resetvec))
} :text = 0xffff
. = RESET_VECTOR_ADDRESS + 0x4;
/*
* Make sure that the bss segment isn't linked at 0x0, otherwise its
* address won't be updated during relocation fixups. Note that
* this is a temporary fix. Code to dynamically the fixup the bss
* location will be added in the future. When the bss relocation
* fixup code is present this workaround should be removed.
*/
#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
. |= 0x10;
#endif
#endif
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss*)
*(.bss*)
*(COMMON)
} :bss
. = ALIGN(4);
__bss_end = . ;
PROVIDE (end = .);
}