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https://github.com/AsahiLinux/u-boot
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7ddd4475a8
The code and comment disagreed: the comment claimed that r6...r31
were copied, and consequently the arrays for "src" and "dst" were
declared with 26 entries, but the actual code ("lmw r5,0(r3)" and
"stmw r5,0(r4)") copied _27_ words (r5 through r31), which resulted
in false "POST cpu Error at multi test" messages.
Fix the comment and the array sizes.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
74 lines
1.9 KiB
C
74 lines
1.9 KiB
C
/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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/*
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* CPU test
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* Load/store multiple word instructions: lmw, stmw
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*
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* 27 consecutive words are loaded from a source memory buffer
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* into GPRs r5 through r31. After that, 27 consecutive words are stored
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* from the GPRs r5 through r31 into a target memory buffer. The contents
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* of the source and target buffers are then compared.
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*/
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#include <post.h>
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#include "cpu_asm.h"
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#if CONFIG_POST & CONFIG_SYS_POST_CPU
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extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2);
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int cpu_post_test_multi(void)
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{
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int ret = 0;
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unsigned int i;
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ulong src[27], dst[27];
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int flag = disable_interrupts();
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ulong code[] = {
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ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */
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ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */
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ASM_BLR, /* blr */
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};
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for (i = 0; i < ARRAY_SIZE(src); ++i) {
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src[i] = i;
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dst[i] = 0;
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}
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cpu_post_exec_02(code, (ulong) src, (ulong) dst);
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ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1;
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if (ret != 0)
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post_log("Error at multi test !\n");
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if (flag)
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enable_interrupts();
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return ret;
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}
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#endif
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