mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 06:12:58 +00:00
4946775c6d
Signed-off-by: Wolfgang Denk <wd@denx.de>
79 lines
2.8 KiB
ArmAsm
79 lines
2.8 KiB
ArmAsm
/*
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* Copyright 2009 Freescale Semiconductor, Inc.
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*
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* Kumar Gala <kumar.gala@freescale.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/* This file is intended to be included by other asm code since
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* we will want to execute this on both the primary core when
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* it does a bootm and the secondary core's that get released
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* out of the spin table */
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#define SET_IVOR(vector_number, vector_offset) \
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li r3,vector_offset@l; \
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mtspr SPRN_IVOR##vector_number,r3;
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#define SET_GIVOR(vector_number, vector_offset) \
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li r3,vector_offset@l; \
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mtspr SPRN_GIVOR##vector_number,r3;
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SET_IVOR(0, 0x020) /* Critical Input */
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SET_IVOR(1, 0x000) /* Machine Check */
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SET_IVOR(2, 0x060) /* Data Storage */
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SET_IVOR(3, 0x080) /* Instruction Storage */
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SET_IVOR(4, 0x0a0) /* External Input */
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SET_IVOR(5, 0x0c0) /* Alignment */
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SET_IVOR(6, 0x0e0) /* Program */
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SET_IVOR(7, 0x100) /* FP Unavailable */
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SET_IVOR(8, 0x120) /* System Call */
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SET_IVOR(9, 0x140) /* Auxiliary Processor Unavailable */
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SET_IVOR(10, 0x160) /* Decrementer */
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SET_IVOR(11, 0x180) /* Fixed Interval Timer */
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SET_IVOR(12, 0x1a0) /* Watchdog Timer */
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SET_IVOR(13, 0x1c0) /* Data TLB Error */
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SET_IVOR(14, 0x1e0) /* Instruction TLB Error */
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SET_IVOR(15, 0x040) /* Debug */
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/* e500v1 & e500v2 only */
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#ifndef CONFIG_E500MC
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SET_IVOR(32, 0x200) /* SPE Unavailable */
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SET_IVOR(33, 0x220) /* Embedded FP Data */
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SET_IVOR(34, 0x240) /* Embedded FP Round */
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#endif
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SET_IVOR(35, 0x260) /* Performance monitor */
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/* e500mc only */
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#ifdef CONFIG_E500MC
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SET_IVOR(36, 0x280) /* Processor doorbell */
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SET_IVOR(37, 0x2a0) /* Processor doorbell critical */
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SET_IVOR(38, 0x2c0) /* Guest Processor doorbell */
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SET_IVOR(39, 0x2e0) /* Guest Processor critical & machine check */
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SET_IVOR(40, 0x300) /* Hypervisor system call */
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SET_IVOR(41, 0x320) /* Hypervisor Priviledge */
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SET_GIVOR(2, 0x060) /* Guest Data Storage */
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SET_GIVOR(3, 0x080) /* Guest Instruction Storage */
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SET_GIVOR(4, 0x0a0) /* Guest External Input */
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SET_GIVOR(8, 0x120) /* Guest System Call */
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SET_GIVOR(13, 0x1c0) /* Guest Data TLB Error */
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SET_GIVOR(14, 0x1e0) /* Guest Instruction TLB Error */
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#endif
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