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aa8ac43645
DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> |
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.. | ||
abb.c | ||
config.mk | ||
emif.c | ||
hw_data.c | ||
hwinit.c | ||
Kconfig | ||
Makefile | ||
prcm-regs.c | ||
sdram.c |