mirror of
https://github.com/AsahiLinux/u-boot
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aa6e94deab
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
95 lines
3 KiB
C
95 lines
3 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
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*/
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#ifndef _CONFIG_HSDK_H_
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#define _CONFIG_HSDK_H_
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#include <linux/sizes.h>
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/*
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* CPU configuration
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*/
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#define NR_CPUS 4
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#define ARC_PERIPHERAL_BASE 0xF0000000
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#define ARC_DWMMC_BASE (ARC_PERIPHERAL_BASE + 0xA000)
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#define ARC_DWGMAC_BASE (ARC_PERIPHERAL_BASE + 0x18000)
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/*
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* Memory configuration
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*/
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
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#define CFG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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#define CFG_SYS_SDRAM_SIZE SZ_1G
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/*
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* UART configuration
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*/
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#define CFG_SYS_NS16550_CLK 33330000
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/*
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* Ethernet PHY configuration
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*/
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/*
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* Environment settings
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*/
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"upgrade=if mmc rescan && " \
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"fatload mmc 0:1 ${loadaddr} u-boot-update.scr && " \
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"iminfo ${loadaddr} && source ${loadaddr}; then; else echo " \
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"\"Fail to upgrade.\n" \
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"Do you have u-boot-update.scr and u-boot.head on first (FAT) SD card partition?\"" \
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"; fi\0" \
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"core_dccm_0=0x10\0" \
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"core_dccm_1=0x6\0" \
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"core_dccm_2=0x10\0" \
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"core_dccm_3=0x6\0" \
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"core_iccm_0=0x10\0" \
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"core_iccm_1=0x6\0" \
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"core_iccm_2=0x10\0" \
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"core_iccm_3=0x6\0" \
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"core_mask=0xF\0" \
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"dcache_ena=0x1\0" \
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"icache_ena=0x1\0" \
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"non_volatile_limit=0xE\0" \
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"hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; \
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setenv dcache_ena 0x0; setenv core_iccm_1 0x7; \
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setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0;\0" \
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"hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
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setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
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"hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
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setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
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"hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
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setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE;\0" \
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"hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_1 0x7; \
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setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE;\0" \
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"hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
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setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
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setenv core_iccm_1 0x6; setenv core_dccm_1 0x6;\0" \
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"hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
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setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
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setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
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setenv core_iccm_2 0x10; setenv core_dccm_2 0x10;\0" \
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"hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; \
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setenv dcache_ena 0x1; setenv core_iccm_0 0x10; \
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setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; \
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setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \
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setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \
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setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0"
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/* Cli configuration */
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/*
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* Callback configuration
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*/
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#endif /* _CONFIG_HSDK_H_ */
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