Patrick Delaunay 37ad8377af stm32mp1: clk: configure pll1 with OPP ... The PLL1 node (st,pll1) is optional in device tree, the max supported frequency define in OPP node is used when the node is absent. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>		2020-07-07 16:01:23 +02:00
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fixed-factor-clock.txt	clk: Add fixed-factor clock driver	2019-02-27 09:12:33 +08:00
fsl,mpc83xx-clk.txt	doc: Remove duplicated documentation directory	2019-06-20 10:57:08 -04:00
microchip,pic32-clock.txt	drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.	2016-02-01 22:14:00 +01:00
nvidia,tegra20-car.txt	tegra: fdt: Add clock bindings	2012-03-29 08:12:48 +02:00
rockchip,rk3188-cru.txt	rockchip: Bring in RK3288 device tree file includes and bindings	2015-09-02 21:28:23 -06:00
rockchip,rk3288-cru.txt	rockchip: Bring in RK3288 device tree file includes and bindings	2015-09-02 21:28:23 -06:00
rockchip,rk3288-dmc.txt	rockchip: Bring in RK3288 device tree file includes and bindings	2015-09-02 21:28:23 -06:00
rockchip,rk3368-dmc.txt	rockchip: rk3368: add DRAM controller driver with DRAM initialisation	2017-08-13 17:12:33 +02:00
rockchip,rk3399-dmc.txt	rockchip: arm64: rk3399: add ddr controller driver	2017-03-16 16:03:45 -06:00
rockchip.txt	rockchip: Bring in RK3288 device tree file includes and bindings	2015-09-02 21:28:23 -06:00
snps,hsdk-cgu.txt	ARC: clk: introduce HSDK CGU clock driver	2017-12-11 11:36:23 +03:00
st,stm32-rcc.txt	clk: stm32f7: add clock driver for stm32f7 family	2017-03-17 14:15:12 -04:00
st,stm32h7-rcc.txt	dm: clk: add clk driver support for stm32h7 SoCs	2017-09-22 07:40:01 -04:00
st,stm32mp1.txt	stm32mp1: clk: configure pll1 with OPP	2020-07-07 16:01:23 +02:00
ti,cdce9xx.txt	clk: cdce9xx: add support for cdce9xx clock synthesizer	2019-10-11 13:32:39 -04:00
ti,sci-clk.txt	clk: Introduce TI System Control Interface (TI SCI) clock driver	2018-09-11 08:32:55 -04:00