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https://github.com/AsahiLinux/u-boot
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d9fd7008f4
In Tegra186, on-SoC clocks are manipulated using IPC requests to the BPMP (Boot and Power Management Processor). This change implements a driver that does that. A tegra/ sub-directory is created to follow the existing pattern. It is unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186 build of U-Boot will need the feature. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
104 lines
2.2 KiB
C
104 lines
2.2 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION.
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <misc.h>
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#include <asm/arch-tegra/bpmp_abi.h>
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static ulong tegra186_clk_get_rate(struct clk *clk)
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{
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struct mrq_clk_request req;
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struct mrq_clk_response resp;
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int ret;
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debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
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clk->id);
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req.cmd_and_id = (CMD_CLK_GET_RATE << 24) | clk->id;
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ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
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sizeof(resp));
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if (ret < 0)
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return ret;
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return resp.clk_get_rate.rate;
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}
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static ulong tegra186_clk_set_rate(struct clk *clk, ulong rate)
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{
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struct mrq_clk_request req;
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struct mrq_clk_response resp;
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int ret;
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debug("%s(clk=%p, rate=%lu) (dev=%p, id=%lu)\n", __func__, clk, rate,
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clk->dev, clk->id);
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req.cmd_and_id = (CMD_CLK_SET_RATE << 24) | clk->id;
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req.clk_set_rate.rate = rate;
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ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
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sizeof(resp));
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if (ret < 0)
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return ret;
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return resp.clk_set_rate.rate;
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}
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static int tegra186_clk_en_dis(struct clk *clk,
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enum mrq_reset_commands cmd)
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{
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struct mrq_clk_request req;
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struct mrq_clk_response resp;
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int ret;
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req.cmd_and_id = (cmd << 24) | clk->id;
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ret = misc_call(clk->dev->parent, MRQ_CLK, &req, sizeof(req), &resp,
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sizeof(resp));
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if (ret < 0)
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return ret;
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return 0;
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}
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static int tegra186_clk_enable(struct clk *clk)
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{
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debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
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clk->id);
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return tegra186_clk_en_dis(clk, CMD_CLK_ENABLE);
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}
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static int tegra186_clk_disable(struct clk *clk)
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{
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debug("%s(clk=%p) (dev=%p, id=%lu)\n", __func__, clk, clk->dev,
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clk->id);
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return tegra186_clk_en_dis(clk, CMD_CLK_DISABLE);
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}
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static struct clk_ops tegra186_clk_ops = {
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.get_rate = tegra186_clk_get_rate,
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.set_rate = tegra186_clk_set_rate,
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.enable = tegra186_clk_enable,
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.disable = tegra186_clk_disable,
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};
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static int tegra186_clk_probe(struct udevice *dev)
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{
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debug("%s(dev=%p)\n", __func__, dev);
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return 0;
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}
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U_BOOT_DRIVER(tegra186_clk) = {
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.name = "tegra186_clk",
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.id = UCLASS_CLK,
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.probe = tegra186_clk_probe,
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.ops = &tegra186_clk_ops,
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};
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