mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 05:42:58 +00:00
82e26e0d68
We like to put the SPL first so it is clear that it relates to SPL. Rename various malloc-related options which have crept in, to stick to this convention. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Martyn Welch <martyn.welch@collabora.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
105 lines
2.7 KiB
Text
105 lines
2.7 KiB
Text
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
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CONFIG_SPL_SYS_DCACHE_OFF=y
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CONFIG_ARCH_CPU_INIT=y
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CONFIG_SYS_THUMB_BUILD=y
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# CONFIG_SPL_USE_ARCH_MEMCPY is not set
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# CONFIG_SPL_USE_ARCH_MEMSET is not set
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CONFIG_ARCH_AT91=y
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CONFIG_TEXT_BASE=0x21000000
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CONFIG_SYS_MALLOC_LEN=0x460000
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CONFIG_TARGET_TAURUS=y
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CONFIG_AT91_GPIO_PULLUP=y
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CONFIG_ATMEL_LEGACY=y
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CONFIG_SPL_GPIO=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds"
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CONFIG_ENV_OFFSET=0x100000
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CONFIG_SPL_DM_SPI=y
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CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus"
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CONFIG_SPL_STACK=0x304000
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000
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CONFIG_SPL=y
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CONFIG_DEBUG_UART_BASE=0xfffff200
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CONFIG_DEBUG_UART_CLOCK=18432000
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CONFIG_ENV_OFFSET_REDUND=0x180000
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI=y
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CONFIG_SYS_LOAD_ADDR=0x22000000
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CONFIG_DEBUG_UART=y
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CONFIG_NAND_BOOT=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTCOMMAND=y
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CONFIG_BOOTCOMMAND="run flash_self"
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_SPL_MAX_SIZE=0x3e00
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CONFIG_SPL_PAD_TO=0x20000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x3e00
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CONFIG_SPL_BSS_MAX_SIZE=0x600
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# CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_SYS_MALLOC=y
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CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
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CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x20ba0000
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CONFIG_SPL_SYS_MALLOC_SIZE=0x460000
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CONFIG_SPL_NAND_SUPPORT=y
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CONFIG_SPL_NAND_RAW_ONLY=y
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CONFIG_SPL_NAND_DRIVERS=y
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CONFIG_SPL_NAND_ECC=y
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CONFIG_SPL_NAND_SOFTECC=y
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CONFIG_SPL_NAND_BASE=y
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CONFIG_SPL_DM_SPI_FLASH=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="U-Boot> "
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=281
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# CONFIG_CMD_BDI is not set
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMI is not set
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# CONFIG_CMD_LOADS is not set
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CONFIG_CMD_NAND=y
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# CONFIG_CMD_PINMUX is not set
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CONFIG_CMD_SPI=y
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# CONFIG_CMD_SOURCE is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_SPL_OF_PLATDATA=y
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CONFIG_ENV_IS_IN_NAND=y
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CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM=y
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CONFIG_CLK=y
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CONFIG_CLK_AT91=y
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CONFIG_AT91_GPIO=y
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# CONFIG_MMC is not set
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CONFIG_MTD=y
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# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
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CONFIG_NAND_ATMEL=y
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CONFIG_SYS_NAND_BLOCK_SIZE=0x20000
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CONFIG_SYS_NAND_PAGE_COUNT=0x40
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CONFIG_SYS_NAND_PAGE_SIZE=0x800
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CONFIG_SYS_NAND_OOBSIZE=0x40
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CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
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CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_MACB=y
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CONFIG_RMII=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_AT91=y
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CONFIG_SPECIFY_CONSOLE_INDEX=y
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CONFIG_ATMEL_USART=y
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CONFIG_WDT=y
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CONFIG_WDT_AT91=y
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CONFIG_SPL_CRC32=y
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CONFIG_HEXDUMP=y
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