Sanchayan Maity e7b860fa4d ARM: vf610: Initial integration for Colibri VF50/VF61 ... This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>		2015-04-23 14:56:09 -04:00
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apalis_t30	dm: i2c: Provide an offset length parameter where needed	2015-01-29 17:09:53 -07:00
colibri_pxa270	pxa: fix wrong comment about vpac270 being the arch number	2015-03-02 10:59:50 +01:00
colibri_t20	ARM: tegra: colibri_t20: fix nand pinmux	2015-03-30 10:04:44 -07:00
colibri_t30	tegra: colibri_t30: asix usb ethernet reset regression	2014-10-22 09:30:55 -07:00
colibri_vf	ARM: vf610: Initial integration for Colibri VF50/VF61	2015-04-23 14:56:09 -04:00