mirror of
https://github.com/AsahiLinux/u-boot
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401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
99 lines
2 KiB
C
99 lines
2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* SchulerControl GmbH, SC_SPS_1 module
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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* on behalf of DENX Software Engineering GmbH
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*/
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#include <common.h>
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#include <init.h>
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#include <net.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/mii.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Functions
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*/
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK0, 480000);
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/* IO1 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK1, 480000);
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/* SSP0 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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/* SSP2 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
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#ifdef CONFIG_CMD_USB
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mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT);
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mxs_iomux_setup_pad(MX28_PAD_AUART2_TX__GPIO_3_9 |
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MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
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gpio_direction_output(MX28_PAD_AUART2_TX__GPIO_3_9, 1);
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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return mxs_dram_init();
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}
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#ifdef CONFIG_CMD_MMC
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int board_mmc_init(struct bd_info *bis)
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{
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return mxsmmc_initialize(bis, 0, NULL, NULL);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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int board_eth_init(struct bd_info *bis)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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int ret;
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ret = cpu_eth_init(bis);
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clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet,
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CLKCTRL_ENET_TIME_SEL_MASK,
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CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN);
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ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC0\n");
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return ret;
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}
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ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC1\n");
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return ret;
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}
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return ret;
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}
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#endif
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