mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
a9022b017a
Serial driver is getting clk information via DT that's why
also clk node needs to have this flag.
Different behavior was introduced by:
"dm: Use dm_scan_fdt_dev() directly where possible"
(sha1: 911954859d)
where simple-bus driver starts to call dm_scan_fdt_dev() which has
additional logic around pre_reloc_only parameter which exclude
clk nodes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
124 lines
1.7 KiB
Text
124 lines
1.7 KiB
Text
/*
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* clock specification for Xilinx ZynqMP ep108 development board
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*
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* (C) Copyright 2015, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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&amba {
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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u-boot,dm-pre-reloc;
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};
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <111111111>;
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};
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sata_clk: sata_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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dp_aclk: clock0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-accuracy = <100>;
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};
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dp_aud_clk: clock1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <22579200>;
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clock-accuracy = <100>;
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};
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};
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&can0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&gem0 {
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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};
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&gpio {
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clocks = <&misc_clk>;
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};
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&i2c0 {
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clocks = <&i2c_clk>;
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};
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&i2c1 {
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clocks = <&i2c_clk>;
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};
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&nand0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&qspi {
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clocks = <&misc_clk &misc_clk>;
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};
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&sata {
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clocks = <&sata_clk>;
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};
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&sdhci0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&sdhci1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&spi0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&spi1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&uart0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&usb0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&usb1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&watchdog0 {
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clocks= <&misc_clk>;
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};
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&xilinx_drm {
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clocks = <&misc_clk>;
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};
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&xlnx_dp {
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clocks = <&dp_aclk>, <&dp_aud_clk>;
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};
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&xlnx_dp_snd_codec0 {
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clocks = <&dp_aud_clk>;
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};
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&xlnx_dpdma {
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clocks = <&misc_clk>;
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};
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