mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 07:57:21 +00:00
d1cbe85b08
- Allow to call sysmon function interactively - PIC on LWMON board needs delay after power-on - Add missing RSR definitions for MPC8xx - Improve log buffer handling: guarantee clean reset after power-on - Add support for EXBITGEN board - Add support for SL8245 board
52 lines
1.6 KiB
C
52 lines
1.6 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#define GPIO_CPU_LED GPIO_3
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#define CPLD_BASE 0x10000000 /* t.b.m. */
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#define DEBUG_LEDS_ADDR CPLD_BASE + 0x01
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#define HW_ID_ADDR CPLD_BASE + 0x02
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#define DIP_SWITCH_ADDR CPLD_BASE + 0x04
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#define PHY_CTRL_ADDR CPLD_BASE + 0x05
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#define SPI_OUT_ADDR CPLD_BASE + 0x07
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#define SPI_IN_ADDR CPLD_BASE + 0x08
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#define MDIO_OUT_ADDR CPLD_BASE + 0x09
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#define MDIO_IN_ADDR CPLD_BASE + 0x0A
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#define MISC_OUT_ADDR CPLD_BASE + 0x0B
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/* Addresses used on I2C bus */
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#define LM75_CHIP_ADDR 0x9C
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#define LM75_CPU_ADDR 0x9E
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#define SDRAM_SPD_ADDR 0xA0
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#define SDRAM_SPD_WRITE_ADDRESS (SDRAM_SPD_ADDR)
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#define SDRAM_SPD_READ_ADDRESS (SDRAM_SPD_ADDR+1)
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#ifndef FALSE
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#define FALSE 0
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#endif
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#ifndef TRUE
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#define TRUE 1
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#endif
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