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https://github.com/AsahiLinux/u-boot
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a768386746
Instead of hardcoding the mx6 silicon revision, read it in run-time. Also, besides the silicon version print the mx6 variant type: quad,dual/solo or solo-lite. Tested on a mx6qsabrelite, where it shows: CPU: Freescale i.MX6Q rev1.0 at 792 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <r64343@freescale.com>
129 lines
2.6 KiB
C
129 lines
2.6 KiB
C
/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*
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* (C) Copyright 2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/errno.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#ifdef CONFIG_FSL_ESDHC
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#include <fsl_esdhc.h>
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#endif
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static char *get_reset_cause(void)
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{
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u32 cause;
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struct src *src_regs = (struct src *)SRC_BASE_ADDR;
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cause = readl(&src_regs->srsr);
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writel(cause, &src_regs->srsr);
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switch (cause) {
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case 0x00001:
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case 0x00011:
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return "POR";
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case 0x00004:
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return "CSU";
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case 0x00008:
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return "IPP USER";
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case 0x00010:
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return "WDOG";
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case 0x00020:
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return "JTAG HIGH-Z";
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case 0x00040:
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return "JTAG SW";
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case 0x10000:
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return "WARM BOOT";
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default:
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return "unknown reset";
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}
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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static char *get_imx_type(u32 imxtype)
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{
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switch (imxtype) {
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case 0x63:
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return "6Q"; /* Quad-core version of the mx6 */
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case 0x61:
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return "6DS"; /* Dual/Solo version of the mx6 */
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case 0x60:
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return "6SL"; /* Solo-Lite version of the mx6 */
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case 0x51:
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return "51";
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case 0x53:
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return "53";
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default:
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return "unknown";
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}
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}
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int print_cpuinfo(void)
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{
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u32 cpurev;
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cpurev = get_cpu_rev();
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printf("CPU: Freescale i.MX%s rev%d.%d at %d MHz\n",
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get_imx_type((cpurev & 0xFF000) >> 12),
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(cpurev & 0x000F0) >> 4,
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(cpurev & 0x0000F) >> 0,
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mxc_get_clock(MXC_ARM_CLK) / 1000000);
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printf("Reset cause: %s\n", get_reset_cause());
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return 0;
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}
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#endif
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int cpu_eth_init(bd_t *bis)
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{
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int rc = -ENODEV;
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#if defined(CONFIG_FEC_MXC)
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rc = fecmxc_initialize(bis);
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#endif
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return rc;
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}
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/*
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* Initializes on-chip MMC controllers.
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* to override, implement board_mmc_init()
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*/
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int cpu_mmc_init(bd_t *bis)
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{
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#ifdef CONFIG_FSL_ESDHC
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return fsl_esdhc_mmc_init(bis);
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#else
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return 0;
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#endif
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}
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void reset_cpu(ulong addr)
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{
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__raw_writew(4, WDOG1_BASE_ADDR);
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}
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