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u-boot/arch/arm/include/asm/arch-fsl-layerscape
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Yunhui Cui a758177f9b armv8/ls2080a: configure PMU's PCTBENR to enable WDT 
The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2016-06-10 13:43:12 -07:00
..
clock.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
config.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
cpu.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
fdt.h armv8/ls1043aqds: add LS1043AQDS board support 2015-11-30 09:11:10 -08:00
fsl_serdes.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
immap_lsch2.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
immap_lsch3.h armv8/ls2080a: configure PMU's PCTBENR to enable WDT 2016-06-10 13:43:12 -07:00
imx-regs.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
ls2080a_stream_id.h armv8: ls2080a: update stream ID partitioning info 2016-03-21 12:42:12 -07:00
mmu.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
mp.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00
ns_access.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
soc.h armv8: fsl-layerscape: Add support of QorIQ LS1012A SoC 2016-06-03 14:12:50 -07:00
speed.h armv8/fsl_lsch3: Change arch to fsl-layerscape 2015-10-29 10:34:00 -07:00