Simon Glass a6d4c45306 x86: ivybridge: Set up XHCI USB ... Add init for XHCI so that high-speed USB can be used. Signed-off-by: Simon Glass <sjg@chromium.org>		2014-11-25 06:34:02 -07:00
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coreboot	x86: Remove board_early_init_r()	2014-11-25 06:33:59 -07:00
ivybridge	x86: ivybridge: Set up XHCI USB	2014-11-25 06:34:02 -07:00
call64.S	x86: Add support for starting 64-bit kernel	2014-10-28 20:43:47 -06:00
config.mk	x86: Factor out common values in the link script	2014-11-25 06:33:59 -07:00
cpu.c	x86: Make show_boot_progress() common	2014-11-21 07:34:15 +01:00
interrupts.c	x86: Fix up some missing prototypes	2014-11-21 07:24:09 +01:00
Makefile	x86: Add ivybridge directory to Makefile	2014-11-25 06:33:56 -07:00
pci.c	x86: pci: Add handlers before and after a PCI hose scan	2014-11-25 06:34:00 -07:00
resetvec.S	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
start.S	x86: ivybridge: Implement SDRAM init	2014-11-21 07:34:15 +01:00
start16.S	x86: Save the BIST value on reset	2014-11-21 07:24:10 +01:00
u-boot.lds	x86: Factor out common values in the link script	2014-11-25 06:33:59 -07:00