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a5d212a263
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
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.. | ||
commproc.c | ||
config.mk | ||
cpu.c | ||
cpu_init.c | ||
ddr-gen1.c | ||
ddr-gen2.c | ||
ddr-gen3.c | ||
ether_fcc.c | ||
fdt.c | ||
interrupts.c | ||
Makefile | ||
mp.c | ||
mp.h | ||
mpc8536_serdes.c | ||
pci.c | ||
qe_io.c | ||
release.S | ||
resetvec.S | ||
serial_scc.c | ||
speed.c | ||
start.S | ||
tlb.c | ||
traps.c |