mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-18 09:13:06 +00:00
7cfbba36e9
This converts the following to Kconfig: CONFIG_SYS_MALLOC_LEN Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
78 lines
2.1 KiB
C
78 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Configuation settings for the bonito board
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*/
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#ifndef __ARMADILLO_800EVA_H
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#define __ARMADILLO_800EVA_H
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#define CONFIG_SH_GPIO_PFC
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#include <asm/arch/rmobile.h>
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#define BOARD_LATE_INIT
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#define CONFIG_TMU_TIMER
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#define CONFIG_SYS_TIMER_COUNTS_DOWN
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#define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
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#define CONFIG_SYS_TIMER_RATE (CONFIG_SYS_CLK_FREQ / 4)
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/* STACK */
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#define CONFIG_SYS_INIT_SP_ADDR 0xE8083000
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#define STACK_AREA_SIZE 0xC000
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#define LOW_LEVEL_MERAM_STACK \
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(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
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/* MEMORY */
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#define ARMADILLO_800EVA_SDRAM_BASE 0x40000000
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#define ARMADILLO_800EVA_SDRAM_SIZE (512 * 1024 * 1024)
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#define CONFIG_SYS_PBSIZE 256
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#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
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/* SCIF */
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#define CONFIG_CONS_SCIF1
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#define SCIF0_BASE 0xe6c40000
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#define SCIF1_BASE 0xe6c50000
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#define SCIF2_BASE 0xe6c60000
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#define SCIF4_BASE 0xe6c80000
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#define CONFIG_SCIF_A
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#undef CONFIG_SYS_LOADS_BAUD_CHANGE
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#define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE)
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#define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE)
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
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#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
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/* FLASH */
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_FLASH_BASE 0x00000000
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#define CONFIG_SYS_MAX_FLASH_SECT 512
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
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#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
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#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
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#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
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#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
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/* ENV setting */
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/* SH Ether */
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#define CONFIG_SH_ETHER_USE_PORT 0
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#define CONFIG_SH_ETHER_PHY_ADDR 0x0
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#define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000
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#define CONFIG_SH_ETHER_SH7734_MII (0x01)
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#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
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#define CONFIG_BITBANGMII_MULTI
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/* Board Clock */
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#define CONFIG_SYS_CLK_FREQ 50000000
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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#endif /* __ARMADILLO_800EVA_H */
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