mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-19 09:43:08 +00:00
3d16b33533
Fix the dr_mode in the U-Boot device tree blob, by reading the mode field from the USB Boot Configuration fields. The dr_mode will only be fixed when booting from USB. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
200 lines
4.3 KiB
C
200 lines
4.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Board specific initialization for AM642 EVM
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*
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* Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
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* Keerthy <j-keerthy@ti.com>
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*
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <spl.h>
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#include <fdt_support.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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#include <env.h>
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#include "../common/board_detect.h"
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#define board_is_am64x_gpevm() board_ti_k3_is("AM64-GPEVM")
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#define board_is_am64x_skevm() board_ti_k3_is("AM64-SKEVM")
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = 0x80000000;
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return 0;
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}
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int dram_init_banksize(void)
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{
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/* Bank 0 declares the memory available in the DDR low region */
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gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
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gd->bd->bi_dram[0].size = 0x80000000;
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gd->ram_size = 0x80000000;
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return 0;
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}
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#if defined(CONFIG_SPL_LOAD_FIT)
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int board_fit_config_name_match(const char *name)
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{
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bool eeprom_read = board_ti_was_eeprom_read();
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if (!eeprom_read || board_is_am64x_gpevm()) {
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if (!strcmp(name, "k3-am642-r5-evm") || !strcmp(name, "k3-am642-evm"))
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return 0;
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} else if (board_is_am64x_skevm()) {
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if (!strcmp(name, "k3-am642-r5-sk") || !strcmp(name, "k3-am642-sk"))
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return 0;
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}
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return -1;
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}
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#endif
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#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(USB_STORAGE)
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static int fixup_usb_boot(const void *fdt_blob)
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{
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int ret = 0;
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switch (spl_boot_device()) {
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case BOOT_DEVICE_USB:
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/*
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* If the boot mode is host, fixup the dr_mode to host
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* before cdns3 bind takes place
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*/
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ret = fdt_find_and_setprop((void *)fdt_blob,
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"/bus@f4000/cdns-usb@f900000/usb@f400000",
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"dr_mode", "host", 5, 0);
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if (ret)
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printf("%s: fdt_find_and_setprop() failed:%d\n",
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__func__, ret);
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fallthrough;
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default:
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break;
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}
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return ret;
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}
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void spl_perform_fixups(struct spl_image_info *spl_image)
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{
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fixup_usb_boot(spl_image->fdt_addr);
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}
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#endif
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#ifdef CONFIG_TI_I2C_BOARD_DETECT
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int do_board_detect(void)
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{
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int ret;
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS);
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if (ret) {
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printf("EEPROM not available at 0x%02x, trying to read at 0x%02x\n",
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CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1);
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ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
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CONFIG_EEPROM_CHIP_ADDRESS + 1);
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if (ret)
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pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
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CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
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}
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return ret;
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}
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int checkboard(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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if (!do_board_detect())
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printf("Board: %s rev %s\n", ep->name, ep->version);
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return 0;
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}
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#ifdef CONFIG_BOARD_LATE_INIT
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static void setup_board_eeprom_env(void)
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{
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char *name = "am64x_gpevm";
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if (do_board_detect())
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goto invalid_eeprom;
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if (board_is_am64x_gpevm())
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name = "am64x_gpevm";
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else if (board_is_am64x_skevm())
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name = "am64x_skevm";
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else
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printf("Unidentified board claims %s in eeprom header\n",
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board_ti_get_name());
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invalid_eeprom:
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set_board_info_env_am6(name);
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}
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static void setup_serial(void)
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{
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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unsigned long board_serial;
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char *endp;
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char serial_string[17] = { 0 };
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if (env_get("serial#"))
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return;
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board_serial = hextoul(ep->serial, &endp);
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if (*endp != '\0') {
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pr_err("Error: Can't set serial# to %s\n", ep->serial);
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return;
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}
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snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
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env_set("serial#", serial_string);
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}
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#endif
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#endif
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#ifdef CONFIG_BOARD_LATE_INIT
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int board_late_init(void)
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{
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if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
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struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
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setup_board_eeprom_env();
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setup_serial();
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/*
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* The first MAC address for ethernet a.k.a. ethernet0 comes from
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* efuse populated via the am654 gigabit eth switch subsystem driver.
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* All the other ones are populated via EEPROM, hence continue with
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* an index of 1.
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*/
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board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt);
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}
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return 0;
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}
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#endif
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#define CTRLMMR_USB0_PHY_CTRL 0x43004008
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#define CORE_VOLTAGE 0x80000000
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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u32 val;
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/* Set USB PHY core voltage to 0.85V */
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val = readl(CTRLMMR_USB0_PHY_CTRL);
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val &= ~(CORE_VOLTAGE);
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writel(val, CTRLMMR_USB0_PHY_CTRL);
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}
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#endif
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