mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-29 08:01:08 +00:00
3f23111722
Initial commit for PH1-Pro4 Ace and Sanji boards. Note: There are two variants for the Ace board in terms of the amount of DDR memory; 1GB or 2GB. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
/*
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* Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <spl.h>
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#include <libfdt.h>
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#include <nand.h>
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#include <linux/io.h>
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#include <../drivers/mtd/nand/denali.h>
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#include "boot-mode/boot-device.h"
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static void nand_denali_wp_disable(void)
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{
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#ifdef CONFIG_NAND_DENALI
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/*
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* Since the boot rom enables the write protection for NAND boot mode,
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* it must be disabled somewhere for "nand write", "nand erase", etc.
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* The workaround is here to not disturb the Denali NAND controller
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* driver just for a really SoC-specific thing.
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*/
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void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE;
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writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT);
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#endif
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}
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struct uniphier_fdt_file {
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const char *compatible;
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const char *file_name;
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};
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static const struct uniphier_fdt_file uniphier_fdt_files[] = {
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{ "socionext,ph1-ld4-ref", "uniphier-ph1-ld4-ref.dtb", },
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{ "socionext,ph1-ld6b-ref", "uniphier-ph1-ld6b-ref.dtb", },
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{ "socionext,ph1-ld10-ref", "uniphier-ph1-ld10-ref.dtb", },
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{ "socionext,ph1-pro4-ace", "uniphier-ph1-pro4-ace.dtb", },
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{ "socionext,ph1-pro4-ref", "uniphier-ph1-pro4-ref.dtb", },
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{ "socionext,ph1-pro4-sanji", "uniphier-ph1-pro4-sanji.dtb", },
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{ "socionext,ph1-pro5-4kbox", "uniphier-ph1-pro5-4kbox.dtb", },
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{ "socionext,ph1-sld3-ref", "uniphier-ph1-sld3-ref.dtb", },
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{ "socionext,ph1-sld8-ref", "uniphier-ph1-sld8-ref.dtb", },
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{ "socionext,proxstream2-gentil", "uniphier-proxstream2-gentil.dtb", },
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{ "socionext,proxstream2-vodka", "uniphier-proxstream2-vodka.dtb", },
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};
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static void uniphier_set_fdt_file(void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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int i;
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/* lookup DTB file name based on the compatible string */
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for (i = 0; i < ARRAY_SIZE(uniphier_fdt_files); i++) {
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if (!fdt_node_check_compatible(gd->fdt_blob, 0,
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uniphier_fdt_files[i].compatible)) {
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setenv("fdt_file", uniphier_fdt_files[i].file_name);
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return;
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}
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}
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}
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int board_late_init(void)
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{
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puts("MODE: ");
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switch (spl_boot_device_raw()) {
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case BOOT_DEVICE_MMC1:
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printf("eMMC Boot\n");
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setenv("bootmode", "emmcboot");
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break;
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case BOOT_DEVICE_NAND:
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printf("NAND Boot\n");
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setenv("bootmode", "nandboot");
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nand_denali_wp_disable();
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break;
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case BOOT_DEVICE_NOR:
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printf("NOR Boot\n");
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setenv("bootmode", "norboot");
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break;
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case BOOT_DEVICE_USB:
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printf("USB Boot\n");
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setenv("bootmode", "usbboot");
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break;
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default:
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printf("Unsupported Boot Mode\n");
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return -1;
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}
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uniphier_set_fdt_file();
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return 0;
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}
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