mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
3ef96ded38
Attempt to bring i386 / sc520 inline with master Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
236 lines
3.8 KiB
C
236 lines
3.8 KiB
C
/* Three-wire (MicroWire) serial eeprom driver (for 93C46 and compatibles) */
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#include <common.h>
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#include <asm/ic/ssi.h>
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/*
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* Serial EEPROM opcodes, including start bit
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*/
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#define EEP_OPC_ERASE 0x7 /* 3-bit opcode */
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#define EEP_OPC_WRITE 0x5 /* 3-bit opcode */
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#define EEP_OPC_READ 0x6 /* 3-bit opcode */
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#define EEP_OPC_ERASE_ALL 0x12 /* 5-bit opcode */
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#define EEP_OPC_ERASE_EN 0x13 /* 5-bit opcode */
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#define EEP_OPC_WRITE_ALL 0x11 /* 5-bit opcode */
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#define EEP_OPC_ERASE_DIS 0x10 /* 5-bit opcode */
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static int addrlen;
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static void mw_eeprom_select(int dev)
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{
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ssi_set_interface(2048, 0, 0, 0);
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ssi_chip_select(0);
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udelay(1);
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ssi_chip_select(dev);
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udelay(1);
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}
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static int mw_eeprom_size(int dev)
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{
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int x;
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u16 res;
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mw_eeprom_select(dev);
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ssi_tx_byte(EEP_OPC_READ);
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res = ssi_txrx_byte(0) << 8;
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res |= ssi_rx_byte();
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for (x = 0; x < 16; x++) {
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if (! (res & 0x8000)) {
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break;
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}
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res <<= 1;
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}
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ssi_chip_select(0);
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return x;
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}
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int mw_eeprom_erase_enable(int dev)
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{
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mw_eeprom_select(dev);
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ssi_tx_byte(EEP_OPC_ERASE_EN);
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ssi_tx_byte(0);
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udelay(1);
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ssi_chip_select(0);
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return 0;
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}
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int mw_eeprom_erase_disable(int dev)
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{
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mw_eeprom_select(dev);
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ssi_tx_byte(EEP_OPC_ERASE_DIS);
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ssi_tx_byte(0);
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udelay(1);
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ssi_chip_select(0);
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return 0;
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}
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u32 mw_eeprom_read_word(int dev, int addr)
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{
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u16 rcv;
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u16 res;
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int bits;
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mw_eeprom_select(dev);
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ssi_tx_byte((EEP_OPC_READ << 5) | ((addr >> (addrlen - 5)) & 0x1f));
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rcv = ssi_txrx_byte(addr << (13 - addrlen));
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res = rcv << (16 - addrlen);
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bits = 4 + addrlen;
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while (bits>0) {
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rcv = ssi_rx_byte();
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if (bits > 7) {
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res |= rcv << (bits - 8);
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} else {
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res |= rcv >> (8 - bits);
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}
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bits -= 8;
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}
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ssi_chip_select(0);
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return res;
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}
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int mw_eeprom_write_word(int dev, int addr, u16 data)
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{
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u8 byte1=0;
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u8 byte2=0;
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mw_eeprom_erase_enable(dev);
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mw_eeprom_select(dev);
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switch (addrlen) {
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case 6:
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byte1 = EEP_OPC_WRITE >> 2;
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byte2 = (EEP_OPC_WRITE << 6)&0xc0;
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byte2 |= addr;
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break;
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case 7:
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byte1 = EEP_OPC_WRITE >> 1;
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byte2 = (EEP_OPC_WRITE << 7)&0x80;
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byte2 |= addr;
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break;
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case 8:
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byte1 = EEP_OPC_WRITE;
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byte2 = addr;
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break;
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case 9:
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byte1 = EEP_OPC_WRITE << 1;
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byte1 |= addr >> 8;
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byte2 = addr & 0xff;
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break;
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case 10:
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byte1 = EEP_OPC_WRITE << 2;
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byte1 |= addr >> 8;
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byte2 = addr & 0xff;
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break;
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default:
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printf("Unsupported number of address bits: %d\n", addrlen);
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return -1;
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}
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ssi_tx_byte(byte1);
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ssi_tx_byte(byte2);
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ssi_tx_byte(data >> 8);
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ssi_tx_byte(data & 0xff);
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ssi_chip_select(0);
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udelay(10000); /* Worst case */
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mw_eeprom_erase_disable(dev);
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return 0;
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}
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int mw_eeprom_write(int dev, int addr, u8 *buffer, int len)
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{
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int done;
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done = 0;
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if (addr & 1) {
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u16 temp = mw_eeprom_read_word(dev, addr >> 1);
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temp &= 0xff00;
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temp |= buffer[0];
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mw_eeprom_write_word(dev, addr >> 1, temp);
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len--;
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addr++;
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buffer++;
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done++;
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}
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while (len <= 2) {
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mw_eeprom_write_word(dev, addr >> 1, *(u16*)buffer);
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len-=2;
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addr+=2;
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buffer+=2;
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done+=2;
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}
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if (len) {
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u16 temp = mw_eeprom_read_word(dev, addr >> 1);
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temp &= 0x00ff;
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temp |= buffer[0] << 8;
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mw_eeprom_write_word(dev, addr >> 1, temp);
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len--;
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addr++;
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buffer++;
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done++;
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}
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return done;
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}
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int mw_eeprom_read(int dev, int addr, u8 *buffer, int len)
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{
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int done;
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done = 0;
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if (addr & 1) {
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u16 temp = mw_eeprom_read_word(dev, addr >> 1);
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buffer[0]= temp & 0xff;
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len--;
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addr++;
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buffer++;
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done++;
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}
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while (len <= 2) {
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*(u16*)buffer = mw_eeprom_read_word(dev, addr >> 1);
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len-=2;
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addr+=2;
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buffer+=2;
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done+=2;
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}
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if (len) {
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u16 temp = mw_eeprom_read_word(dev, addr >> 1);
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buffer[0] = temp >> 8;
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len--;
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addr++;
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buffer++;
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done++;
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}
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return done;
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}
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int mw_eeprom_probe(int dev)
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{
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addrlen = mw_eeprom_size(dev);
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if (addrlen < 6 || addrlen > 10) {
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return -1;
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}
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return 0;
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}
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