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64203c7b0f
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards. Note that according to errata from Atmel, OHCI is not operational on the first revision of at91sam9g45 chip. So this patch enables OHCI support for later revisions. Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
99 lines
2.8 KiB
C
99 lines
2.8 KiB
C
/*
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* (C) Copyright 2006
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* DENX Software Engineering <mk@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
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#include <asm/arch/hardware.h>
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#include <asm/arch/io.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/clk.h>
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int usb_cpu_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
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#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
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defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \
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defined(CONFIG_AT91SAM9261)
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/* Enable PLLB */
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writel(get_pllb_init(), &pmc->pllbr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
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;
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#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
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/* Enable UPLL */
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writel(readl(&pmc->uckr) | AT91_PMC_UPLLEN | AT91_PMC_BIASEN,
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&pmc->uckr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKU) != AT91_PMC_LOCKU)
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;
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/* Select PLLA as input clock of OHCI */
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writel(AT91_PMC_USBS_USB_UPLL | AT91_PMC_USBDIV_10, &pmc->usb);
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#endif
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/* Enable USB host clock. */
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writel(1 << AT91_ID_UHP, &pmc->pcer);
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#ifdef CONFIG_AT91SAM9261
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writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scer);
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#else
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writel(AT91_PMC_UHP, &pmc->scer);
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#endif
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return 0;
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}
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int usb_cpu_stop(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *)AT91_PMC_BASE;
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/* Disable USB host clock. */
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writel(1 << AT91_ID_UHP, &pmc->pcdr);
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#ifdef CONFIG_AT91SAM9261
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writel(AT91_PMC_UHP | AT91_PMC_HCK0, &pmc->scdr);
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#else
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writel(AT91_PMC_UHP, &pmc->scdr);
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#endif
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#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
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defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20)
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/* Disable PLLB */
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writel(0, &pmc->pllbr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKB) != 0)
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;
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#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
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/* Disable UPLL */
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writel(readl(&pmc->uckr) & (~AT91_PMC_UPLLEN), &pmc->uckr);
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while ((readl(&pmc->sr) & AT91_PMC_LOCKU) == AT91_PMC_LOCKU)
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;
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#endif
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return 0;
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}
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int usb_cpu_init_fail(void)
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{
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return usb_cpu_stop();
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}
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#endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
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