mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-12 16:07:30 +00:00
14bf25d50d
This patch introduces a generic ARMv8 PSCI framework, with all functions returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each platform to implement their own functions based on this framework. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
84 lines
2.9 KiB
Text
84 lines
2.9 KiB
Text
if ARM64
|
|
|
|
config ARMV8_MULTIENTRY
|
|
bool "Enable multiple CPUs to enter into U-Boot"
|
|
|
|
config ARMV8_SPIN_TABLE
|
|
bool "Support spin-table enable method"
|
|
depends on ARMV8_MULTIENTRY && OF_LIBFDT
|
|
help
|
|
Say Y here to support "spin-table" enable method for booting Linux.
|
|
|
|
To use this feature, you must do:
|
|
- Specify enable-method = "spin-table" in each CPU node in the
|
|
Device Tree you are using to boot the kernel
|
|
- Let secondary CPUs in U-Boot (in a board specific manner)
|
|
before the master CPU jumps to the kernel
|
|
|
|
U-Boot automatically does:
|
|
- Set "cpu-release-addr" property of each CPU node
|
|
(overwrites it if already exists).
|
|
- Reserve the code for the spin-table and the release address
|
|
via a /memreserve/ region in the Device Tree.
|
|
|
|
config PSCI_RESET
|
|
bool "Use PSCI for reset and shutdown"
|
|
default y
|
|
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
|
|
!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
|
|
!TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
|
|
!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
|
|
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
|
|
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
|
|
!ARCH_UNIPHIER && !ARCH_SNAPDRAGON && !TARGET_S32V234EVB
|
|
help
|
|
Most armv8 systems have PSCI support enabled in EL3, either through
|
|
ARM Trusted Firmware or other firmware.
|
|
|
|
On these systems, we do not need to implement system reset manually,
|
|
but can instead rely on higher level firmware to deal with it.
|
|
|
|
Select Y here to make use of PSCI calls for system reset
|
|
|
|
config ARMV8_PSCI
|
|
bool "Enable PSCI support" if EXPERT
|
|
default n
|
|
help
|
|
PSCI is Power State Coordination Interface defined by ARM.
|
|
The PSCI in U-boot provides a general framework and each platform
|
|
can implement their own specific PSCI functions.
|
|
Say Y here to enable PSCI support on ARMv8 platform.
|
|
|
|
config ARMV8_PSCI_NR_CPUS
|
|
int "Maximum supported CPUs for PSCI"
|
|
depends on ARMV8_PSCI
|
|
default 4
|
|
help
|
|
The maximum number of CPUs supported in the PSCI firmware.
|
|
It is no problem to set a larger value than the number of CPUs in
|
|
the actual hardware implementation.
|
|
|
|
config ARMV8_PSCI_CPUS_PER_CLUSTER
|
|
int "Number of CPUs per cluster"
|
|
depends on ARMV8_PSCI
|
|
default 0
|
|
help
|
|
The number of CPUs per cluster, suppose each cluster has same number
|
|
of CPU cores, platforms with asymmetric clusters don't apply here.
|
|
A value 0 or no definition of it works for single cluster system.
|
|
System with multi-cluster should difine their own exact value.
|
|
|
|
if SYS_HAS_ARMV8_SECURE_BASE
|
|
|
|
config ARMV8_SECURE_BASE
|
|
hex "Secure address for PSCI image"
|
|
depends on ARMV8_PSCI
|
|
help
|
|
Address for placing the PSCI text, data and stack sections.
|
|
If not defined, the PSCI sections are placed together with the u-boot
|
|
but platform can choose to place PSCI code image separately in other
|
|
places such as some secure RAM built-in SOC etc.
|
|
|
|
endif
|
|
|
|
endif
|