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https://github.com/AsahiLinux/u-boot
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9675d92027
As the RISC-V ACLINT specification is defined to be backward compatible with the SiFive CLINT specification, we rename SiFive CLINT to RISC-V ALINT in the source tree to be future-proof. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Rick Chen <rick@andestech.com>
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (c) 2017 Microsemi Corporation.
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* Padmarao Begari, Microsemi Corporation <padmarao.begari@microsemi.com>
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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#include <asm/smp.h>
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#include <asm/u-boot.h>
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#include <compiler.h>
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/* Architecture-specific global data */
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struct arch_global_data {
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long boot_hart; /* boot hart id */
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phys_addr_t firmware_fdt_addr;
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#if CONFIG_IS_ENABLED(RISCV_ACLINT)
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void __iomem *aclint; /* aclint base address */
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#endif
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#ifdef CONFIG_ANDES_PLICSW
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void __iomem *plicsw; /* andes plicsw base address */
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#endif
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#if CONFIG_IS_ENABLED(SMP)
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struct ipi_data ipi[CONFIG_NR_CPUS];
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#endif
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#if !CONFIG_IS_ENABLED(XIP)
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#ifdef CONFIG_AVAILABLE_HARTS
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ulong available_harts;
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#endif
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#endif
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};
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#include <asm-generic/global_data.h>
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#define DECLARE_GLOBAL_DATA_PTR register gd_t *gd asm ("gp")
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static inline void set_gd(volatile gd_t *gd_ptr)
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{
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#ifdef CONFIG_64BIT
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asm volatile("ld gp, %0\n" : : "m"(gd_ptr));
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#else
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asm volatile("lw gp, %0\n" : : "m"(gd_ptr));
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#endif
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}
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#endif /* __ASM_GBL_DATA_H */
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