mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-19 03:08:31 +00:00
a38a3c4af4
T124/210 requires some specific configuration (VPR setup) to be performed by the bootloader before the GPU can be used. For this reason, the GPU node in the device tree is disabled by default. This patch enables the node if U-boot has performed VPR configuration. Boards enabled by this patch are T124's Jetson TK1 and Venice2 and T210's P2571. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
37 lines
760 B
C
37 lines
760 B
C
/*
|
|
* (C) Copyright 2013-2014
|
|
* NVIDIA Corporation <www.nvidia.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/arch/gpio.h>
|
|
#include <asm/arch/pinmux.h>
|
|
#include <asm/arch-tegra/gpu.h>
|
|
#include "pinmux-config-venice2.h"
|
|
|
|
/*
|
|
* Routine: pinmux_init
|
|
* Description: Do individual peripheral pinmux configs
|
|
*/
|
|
void pinmux_init(void)
|
|
{
|
|
pinmux_set_tristate_input_clamping();
|
|
|
|
gpio_config_table(venice2_gpio_inits,
|
|
ARRAY_SIZE(venice2_gpio_inits));
|
|
|
|
pinmux_config_pingrp_table(venice2_pingrps,
|
|
ARRAY_SIZE(venice2_pingrps));
|
|
|
|
pinmux_config_drvgrp_table(venice2_drvgrps,
|
|
ARRAY_SIZE(venice2_drvgrps));
|
|
}
|
|
|
|
int ft_board_setup(void *blob, bd_t *bd)
|
|
{
|
|
gpu_enable_node(blob, "/gpu@0,57000000");
|
|
|
|
return 0;
|
|
}
|