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7a2704369c
This CONFIG option is only used in denali_spl.c Move it close to SPL_NAND_DENALI, and make it depend on SPL_NAND_DENALI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
415 lines
12 KiB
Text
415 lines
12 KiB
Text
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menuconfig MTD_RAW_NAND
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bool "Raw NAND Device Support"
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if MTD_RAW_NAND
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config SYS_NAND_SELF_INIT
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bool
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help
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This option, if enabled, provides more flexible and linux-like
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NAND initialization process.
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config SYS_NAND_DRIVER_ECC_LAYOUT
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bool
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help
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Omit standard ECC layouts to safe space. Select this if your driver
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is known to provide its own ECC layout.
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config SYS_NAND_USE_FLASH_BBT
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bool "Enable BBT (Bad Block Table) support"
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help
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Enable the BBT (Bad Block Table) usage.
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config NAND_ATMEL
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bool "Support Atmel NAND controller"
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imply SYS_NAND_USE_FLASH_BBT
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help
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Enable this driver for NAND flash platforms using an Atmel NAND
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controller.
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if NAND_ATMEL
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config ATMEL_NAND_HWECC
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bool "Atmel Hardware ECC"
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default n
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config ATMEL_NAND_HW_PMECC
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bool "Atmel Programmable Multibit ECC (PMECC)"
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select ATMEL_NAND_HWECC
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default n
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help
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The Programmable Multibit ECC (PMECC) controller is a programmable
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binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder.
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config PMECC_CAP
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int "PMECC Correctable ECC Bits"
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depends on ATMEL_NAND_HW_PMECC
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default 2
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help
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Correctable ECC bits, can be 2, 4, 8, 12, and 24.
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config PMECC_SECTOR_SIZE
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int "PMECC Sector Size"
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depends on ATMEL_NAND_HW_PMECC
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default 512
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help
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Sector size, in bytes, can be 512 or 1024.
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config SPL_GENERATE_ATMEL_PMECC_HEADER
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bool "Atmel PMECC Header Generation"
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select ATMEL_NAND_HWECC
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select ATMEL_NAND_HW_PMECC
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default n
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help
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Generate Programmable Multibit ECC (PMECC) header for SPL image.
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endif
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config NAND_BRCMNAND
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bool "Support Broadcom NAND controller"
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depends on OF_CONTROL && DM && DM_MTD
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help
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Enable the driver for NAND flash on platforms using a Broadcom NAND
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controller.
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config NAND_BRCMNAND_6368
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bool "Support Broadcom NAND controller on bcm6368"
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depends on NAND_BRCMNAND && ARCH_BMIPS
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help
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Enable support for broadcom nand driver on bcm6368.
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config NAND_BRCMNAND_68360
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bool "Support Broadcom NAND controller on bcm68360"
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depends on NAND_BRCMNAND && ARCH_BCM68360
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help
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Enable support for broadcom nand driver on bcm68360.
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config NAND_BRCMNAND_6838
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bool "Support Broadcom NAND controller on bcm6838"
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depends on NAND_BRCMNAND && ARCH_BMIPS && SOC_BMIPS_BCM6838
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help
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Enable support for broadcom nand driver on bcm6838.
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config NAND_BRCMNAND_6858
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bool "Support Broadcom NAND controller on bcm6858"
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depends on NAND_BRCMNAND && ARCH_BCM6858
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help
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Enable support for broadcom nand driver on bcm6858.
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config NAND_BRCMNAND_63158
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bool "Support Broadcom NAND controller on bcm63158"
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depends on NAND_BRCMNAND && ARCH_BCM63158
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help
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Enable support for broadcom nand driver on bcm63158.
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config NAND_DAVINCI
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bool "Support TI Davinci NAND controller"
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help
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Enable this driver for NAND flash controllers available in TI Davinci
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and Keystone2 platforms
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config NAND_DENALI
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bool
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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config NAND_DENALI_DT
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bool "Support Denali NAND controller as a DT device"
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select NAND_DENALI
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depends on OF_CONTROL && DM_MTD
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help
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Enable the driver for NAND flash on platforms using a Denali NAND
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controller as a DT device.
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config NAND_LPC32XX_SLC
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bool "Support LPC32XX_SLC controller"
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help
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Enable the LPC32XX SLC NAND controller.
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config NAND_OMAP_GPMC
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bool "Support OMAP GPMC NAND controller"
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depends on ARCH_OMAP2PLUS
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help
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Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms.
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GPMC controller is used for parallel NAND flash devices, and can
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do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
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and BCH16 ECC algorithms.
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config NAND_OMAP_GPMC_PREFETCH
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bool "Enable GPMC Prefetch"
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depends on NAND_OMAP_GPMC
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default y
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help
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On OMAP platforms that use the GPMC controller
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(CONFIG_NAND_OMAP_GPMC_PREFETCH), this options enables the code that
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uses the prefetch mode to speed up read operations.
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config NAND_OMAP_ELM
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bool "Enable ELM driver for OMAPxx and AMxx platforms."
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depends on NAND_OMAP_GPMC && !OMAP34XX
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help
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ELM controller is used for ECC error detection (not ECC calculation)
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of BCH4, BCH8 and BCH16 ECC algorithms.
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
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thus such SoC platforms need to depend on software library for ECC error
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detection. However ECC calculation on such plaforms would still be
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done by GPMC controller.
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config NAND_VF610_NFC
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bool "Support for Freescale NFC for VF610"
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select SYS_NAND_SELF_INIT
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select SYS_NAND_DRIVER_ECC_LAYOUT
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imply CMD_NAND
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help
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Enables support for NAND Flash Controller on some Freescale
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processors like the VF610, MCF54418 or Kinetis K70.
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The driver supports a maximum 2k page size. The driver
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currently does not support hardware ECC.
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if NAND_VF610_NFC
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config NAND_VF610_NFC_DT
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bool "Support Vybrid's vf610 NAND controller as a DT device"
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depends on OF_CONTROL && DM_MTD
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help
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Enable the driver for Vybrid's vf610 NAND flash on platforms
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using device tree.
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choice
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prompt "Hardware ECC strength"
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depends on NAND_VF610_NFC
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default SYS_NAND_VF610_NFC_45_ECC_BYTES
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help
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Select the ECC strength used in the hardware BCH ECC block.
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config SYS_NAND_VF610_NFC_45_ECC_BYTES
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bool "24-error correction (45 ECC bytes)"
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config SYS_NAND_VF610_NFC_60_ECC_BYTES
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bool "32-error correction (60 ECC bytes)"
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endchoice
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endif
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config NAND_PXA3XX
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bool "Support for NAND on PXA3xx and Armada 370/XP/38x"
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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This enables the driver for the NAND flash device found on
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PXA3xx processors (NFCv1) and also on Armada 370/XP (NFCv2).
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config NAND_SUNXI
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bool "Support for NAND on Allwinner SoCs"
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default ARCH_SUNXI
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depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I || MACH_SUN8I
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select SYS_NAND_SELF_INIT
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select SYS_NAND_U_BOOT_LOCATIONS
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select SPL_NAND_SUPPORT
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imply CMD_NAND
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---help---
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Enable support for NAND. This option enables the standard and
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SPL drivers.
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The SPL driver only supports reading from the NAND using DMA
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transfers.
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if NAND_SUNXI
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config NAND_SUNXI_SPL_ECC_STRENGTH
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int "Allwinner NAND SPL ECC Strength"
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default 64
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config NAND_SUNXI_SPL_ECC_SIZE
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int "Allwinner NAND SPL ECC Step Size"
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default 1024
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config NAND_SUNXI_SPL_USABLE_PAGE_SIZE
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int "Allwinner NAND SPL Usable Page Size"
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default 1024
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endif
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config NAND_ARASAN
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bool "Configure Arasan Nand"
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select SYS_NAND_SELF_INIT
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select DM_MTD
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imply CMD_NAND
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help
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This enables Nand driver support for Arasan nand flash
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controller. This uses the hardware ECC for read and
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write operations.
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config NAND_MXC
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bool "MXC NAND support"
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depends on CPU_ARM926EJS || CPU_ARM1136 || MX5
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imply CMD_NAND
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help
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This enables the NAND driver for the NAND flash controller on the
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i.MX27 / i.MX31 / i.MX5 rocessors.
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config NAND_MXS
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bool "MXS NAND support"
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depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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select APBH_DMA
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select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
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select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
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help
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This enables NAND driver for the NAND flash controller on the
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MXS processors.
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if NAND_MXS
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config NAND_MXS_DT
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bool "Support MXS NAND controller as a DT device"
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depends on OF_CONTROL && DM_MTD
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help
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Enable the driver for MXS NAND flash on platforms using
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device tree.
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config NAND_MXS_USE_MINIMUM_ECC
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bool "Use minimum ECC strength supported by the controller"
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default false
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endif
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config NAND_ZYNQ
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bool "Support for Zynq Nand controller"
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select SYS_NAND_SELF_INIT
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select DM_MTD
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imply CMD_NAND
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help
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This enables Nand driver support for Nand flash controller
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found on Zynq SoC.
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config NAND_ZYNQ_USE_BOOTLOADER1_TIMINGS
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bool "Enable use of 1st stage bootloader timing for NAND"
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depends on NAND_ZYNQ
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help
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This flag prevent U-boot reconfigure NAND flash controller and reuse
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the NAND timing from 1st stage bootloader.
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config NAND_STM32_FMC2
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bool "Support for NAND controller on STM32MP SoCs"
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depends on ARCH_STM32MP
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select SYS_NAND_SELF_INIT
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imply CMD_NAND
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help
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Enables support for NAND Flash chips on SoCs containing the FMC2
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NAND controller. This controller is found on STM32MP SoCs.
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The controller supports a maximum 8k page size and supports
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a maximum 8-bit correction error per sector of 512 bytes.
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comment "Generic NAND options"
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config SYS_NAND_BLOCK_SIZE
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hex "NAND chip eraseblock size"
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depends on ARCH_SUNXI
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help
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Number of data bytes in one eraseblock for the NAND chip on the
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board. This is the multiple of NAND_PAGE_SIZE and the number of
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pages.
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config SYS_NAND_PAGE_SIZE
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hex "NAND chip page size"
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depends on ARCH_SUNXI
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help
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Number of data bytes in one page for the NAND chip on the
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board, not including the OOB area.
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config SYS_NAND_OOBSIZE
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hex "NAND chip OOB size"
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depends on ARCH_SUNXI
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help
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Number of bytes in the Out-Of-Band area for the NAND chip on
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the board.
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# Enhance depends when converting drivers to Kconfig which use this config
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# option (mxc_nand, ndfc, omap_gpmc).
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config SYS_NAND_BUSWIDTH_16BIT
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bool "Use 16-bit NAND interface"
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depends on NAND_VF610_NFC || NAND_OMAP_GPMC || NAND_MXC || ARCH_DAVINCI
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help
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Indicates that NAND device has 16-bit wide data-bus. In absence of this
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config, bus-width of NAND device is assumed to be either 8-bit and later
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determined by reading ONFI params.
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Above config is useful when NAND device's bus-width information cannot
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be determined from on-chip ONFI params, like in following scenarios:
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- SPL boot does not support reading of ONFI parameters. This is done to
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keep SPL code foot-print small.
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- In current U-Boot flow using nand_init(), driver initialization
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happens in board_nand_init() which is called before any device probe
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(nand_scan_ident + nand_scan_tail), thus device's ONFI parameters are
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not available while configuring controller. So a static CONFIG_NAND_xx
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is needed to know the device's bus-width in advance.
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config SYS_NAND_MAX_CHIPS
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int "NAND max chips"
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default 1
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depends on NAND_ARASAN
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help
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The maximum number of NAND chips per device to be supported.
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if SPL
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config SYS_NAND_U_BOOT_LOCATIONS
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bool "Define U-boot binaries locations in NAND"
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help
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Enable CONFIG_SYS_NAND_U_BOOT_OFFS though Kconfig.
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This option should not be enabled when compiling U-boot for boards
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defining CONFIG_SYS_NAND_U_BOOT_OFFS in their include/configs/<board>.h
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file.
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config SYS_NAND_U_BOOT_OFFS
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hex "Location in NAND to read U-Boot from"
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default 0x800000 if NAND_SUNXI
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depends on SYS_NAND_U_BOOT_LOCATIONS
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help
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Set the offset from the start of the nand where u-boot should be
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loaded from.
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config SYS_NAND_U_BOOT_OFFS_REDUND
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hex "Location in NAND to read U-Boot from"
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default SYS_NAND_U_BOOT_OFFS
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depends on SYS_NAND_U_BOOT_LOCATIONS
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help
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Set the offset from the start of the nand where the redundant u-boot
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should be loaded from.
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config SPL_NAND_AM33XX_BCH
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bool "Enables SPL-NAND driver which supports ELM based"
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depends on NAND_OMAP_GPMC && !OMAP34XX
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default y
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help
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Hardware ECC correction. This is useful for platforms which have ELM
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hardware engine and use NAND boot mode.
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Some legacy platforms like OMAP3xx do not have in-built ELM h/w engine,
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so those platforms should use CONFIG_SPL_NAND_SIMPLE for enabling
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SPL-NAND driver with software ECC correction support.
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config SPL_NAND_DENALI
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bool "Support Denali NAND controller for SPL"
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help
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This is a small implementation of the Denali NAND controller
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for use on SPL.
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config NAND_DENALI_SPARE_AREA_SKIP_BYTES
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int "Number of bytes skipped in OOB area"
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depends on SPL_NAND_DENALI
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range 0 63
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help
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This option specifies the number of bytes to skip from the beginning
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of OOB area before last ECC sector data starts. This is potentially
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used to preserve the bad block marker in the OOB area.
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config SPL_NAND_SIMPLE
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bool "Use simple SPL NAND driver"
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depends on !SPL_NAND_AM33XX_BCH
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help
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Support for NAND boot using simple NAND drivers that
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expose the cmd_ctrl() interface.
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endif
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endif # if NAND
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