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68083b897b
The compatible values used for device nodes representing Renesas Reduced Pin Count Interfaces were based on preliminary versions of the Device Tree Bindings. Correct them in both DTSi files and drivers, to match the final DT Bindings. Note that there are no DT bindings for RPC-IF on RZ/A1 yet, hence the most logical SoC-specific value is used, without specifying a family-specific value. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
92 lines
1.6 KiB
Text
92 lines
1.6 KiB
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source extras for U-Boot for the GR Peach board
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*
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* Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include "r7s72100-gr-peach.dts"
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/ {
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aliases {
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spi0 = &rpc;
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};
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soc {
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u-boot,dm-pre-reloc;
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};
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leds {
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led1 {
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label = "peach:bottom:red";
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};
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led-red {
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label = "peach:tri:red";
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gpios = <&port6 13 GPIO_ACTIVE_HIGH>;
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};
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led-green {
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label = "peach:tri:green";
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gpios = <&port6 14 GPIO_ACTIVE_HIGH>;
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};
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led-blue {
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label = "peach:tri:blue";
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gpios = <&port6 15 GPIO_ACTIVE_HIGH>;
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};
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};
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reg_usbhs0_vbus: regulator-usbhs0-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usbhs0_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&port4 1 GPIO_ACTIVE_LOW>;
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};
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rpc: spi@ee200000 {
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compatible = "renesas,r7s72100-rpc-if";
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reg = <0x3fefa000 0x100>, <0x18000000 0x08000000>;
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bank-width = <2>;
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num-cs = <1>;
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status = "okay";
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spi-max-frequency = <50000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash0: spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <1>;
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reg = <0>;
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status = "okay";
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};
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};
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};
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&ostm0 {
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u-boot,dm-pre-reloc;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&scif2 {
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u-boot,dm-pre-reloc;
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clock = <66666666>; /* ToDo: Replace by DM clock driver */
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};
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&scif2_pins {
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u-boot,dm-pre-reloc;
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};
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&usbhs0 {
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vbus-supply = <®_usbhs0_vbus>;
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status = "okay";
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};
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