mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-17 18:28:55 +00:00
984639039f
The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
205 lines
2.9 KiB
Text
205 lines
2.9 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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#include <config.h>
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/ {
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c3;
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i2c2 = &i2c4;
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ethernet2 = &enetc_port2;
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ethernet3 = &enetc_port3;
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};
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binman: binman {
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multiple-images;
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};
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};
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&binman {
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u_boot_rom: u-boot-rom {
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filename = "u-boot.rom";
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pad-byte = <0xff>;
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u-boot-spl {
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};
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fit {
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offset = <CONFIG_SPL_PAD_TO>;
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description = "FIT image with multiple configurations";
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fit,fdt-list = "of-list";
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images {
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uboot {
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description = "U-Boot";
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type = "firmware";
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os = "u-boot";
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arch = "arm";
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compression = "none";
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load = <CONFIG_TEXT_BASE>;
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u-boot-nodtb {
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};
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};
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@fdt-SEQ {
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description = "NAME";
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type = "flat_dt";
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compression = "none";
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};
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};
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configurations {
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default = "@config-DEFAULT-SEQ";
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@config-SEQ {
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description = "NAME";
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firmware = "uboot";
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fdt = "fdt-SEQ";
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};
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};
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};
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};
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};
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&binman {
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u-boot-update {
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filename = "u-boot.update";
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fit {
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description = "FIT update image";
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images {
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u-boot-bin {
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description = "U-Boot";
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type = "firmware";
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os = "u-boot";
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arch = "arm";
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compression = "none";
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load = <0>; /* unused */
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blob {
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filename = "u-boot.rom";
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};
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};
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};
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};
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};
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};
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#ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE
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/ {
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chosen {
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stdout-path = "serial2:115200n8";
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};
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};
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#endif
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#ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31
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&u_boot_rom {
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fit {
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images {
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bl31 {
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description = "ARM Trusted Firmware (bl31)";
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type = "firmware";
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arch = "arm";
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os = "arm-trusted-firmware";
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compression = "none";
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load = <CONFIG_SL28_BL31_ENTRY_ADDR>;
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entry = <CONFIG_SL28_BL31_ENTRY_ADDR>;
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blob-ext {
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filename = "bl31.bin";
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};
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};
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};
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configurations {
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@config-SEQ {
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firmware = "bl31";
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loadables = "uboot";
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};
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};
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};
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};
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#endif
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#ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32
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&u_boot_rom {
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fit {
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images {
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bl32 {
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description = "OP-TEE Trusted OS (bl32)";
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type = "firmware";
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arch = "arm";
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os = "tee";
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compression = "none";
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load = <CONFIG_SL28_BL32_ENTRY_ADDR>;
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entry = <CONFIG_SL28_BL32_ENTRY_ADDR>;
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blob-ext {
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filename = "tee.bin";
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};
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};
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};
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configurations {
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@config-SEQ {
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loadables = "uboot", "bl32";
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};
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};
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};
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};
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#endif
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&fspi {
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u-boot,dm-pre-reloc;
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flash@0 {
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u-boot,dm-pre-reloc;
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};
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};
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&dspi2 {
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u-boot,dm-pre-reloc;
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};
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&esdhc {
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u-boot,dm-pre-reloc;
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};
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&esdhc1 {
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u-boot,dm-pre-reloc;
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};
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&lpuart1 {
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u-boot,dm-pre-reloc;
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};
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&duart0 {
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u-boot,dm-pre-reloc;
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};
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/*
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* u-boot will enable the device in the linux device tree in place. Because
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* we are using the linux device tree, we have to enable the PCI controller
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* ourselves.
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*/
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&pcie1 {
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status = "okay";
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};
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&pcie2 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&soc {
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u-boot,dm-pre-reloc;
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};
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&sysclk {
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u-boot,dm-pre-reloc;
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};
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